dil@lfcs.ed.ac.uk (David Laurenson) (11/22/89)
Thanks for all your help on the buffers for the transputer link. Now I have an extremely technical query about the C011 adaptor itself. What I am trying to do is use the input of the C011 to read in the data on the link, but leave the output disconnected so that acknowledges are not transmitted. The acknowledges are to be handled by the normal transputer at the other end of the link. A diagram is shown below:- ________ ________ Transp.| |Transp. 1 |-----<-----<-----<-----<-| 2 | Tap | l.out |----->---o->----->----->-| l. in _______| | |_______ | _____________ |----->---->|C011 input |-----\ | | \ parallel bus to N/C <-----<----|C011 output| / processor |___________|-----/ The problem that I have is that the data sheets do not indicate whether this type of operation is possible. The data book gives the timings in the following form:- ______________________________________________________________ LinkIn Data (11 bits)|____________________|Data (11 bits) _____________________ ________________________________________ Q0-7 _____________________X________________________________________ _________ QValid ________________________/ \___________________________ __________ QAck __________________________/ \________________________ ______________________________________________________________ LinkOut_________________________________|Ack|________________________ What the data-book doesn't tell me is if the C011 can be used as shown below so that overlapping ACK implemented on Transputer 2 will still work. The resultant waveform would have to look like this:- ______________________________________________________________ LinkIn Data (11 bits)| Data (11 bits) |Data (11 bits) _____________________ _____________________________ __________ Q0-7 _____________________X_____________________________X__________ _________ _______ QValid ________________________/ \___________________/ __________ _____ QAck __________________________/ \__________________/ ______________________________________________________________ LinkOut_________________________________|Ack|________________________ The LinkOut of the C011 is not connected, so the last waveform on this diagram is irrelevant, but is included for completeness. As can be seen, the data is arriving at the LinkIn input before the C011 has had time to signal that the previous byte has arrived, and set up all of its Q0-7, QValid, and QAck signals. I know that this is a rather unorthodox way of doing things, but I can see no other way around it. Also does anyone have an idea what an Ack arriving at LinkIn when no data has been sent down LinkOut will do? If anyone has any ideas could you mail them to me, and I'll produce a summary in about a weeks time (or maybe longer depending upon the response). Thanks (in anticipation), Dave. David I. Laurenson | Department of Computer Science | Edinburgh University King's Bldgs | JANET dil@uk.ac.ed.lfcs Mayfield Road, EDINBURGH U.K. |
dil@lfcs.ed.ac.uk (David Laurenson) (11/27/89)
Recently I posted an article requesting some technical information on the C011 link adapter as part of my final-year undergraduate project to build a Transputer Link Analyser. Unfortunately this time response was poor, but I'll post what I have discovered from inMoS. Here is a copy of the relevant parts of the message that I sent out:- >________ ________ >Transp.| |Transp. > 1 |-----<-----<-----<-----<-| 2 > | Tap | >l.out |----->---o->----->----->-| l. in >_______| | |_______ > | _____________ > |----->---->|C011 input |-----\ > | | \ parallel bus to > N/C <-----<----|C011 output| / processor > |___________|-----/ > >The problem that I have is that the data sheets do not indicate >whether this type of operation is possible. The data book gives the >timings in the following form:- > ______________________________________________________________ >LinkIn Data (11 bits)|____________________|Data (11 bits) > _____________________ ________________________________________ >Q0-7 _____________________X________________________________________ > _________ >QValid ________________________/ \___________________________ > __________ >QAck __________________________/ \________________________ > ______________________________________________________________ >LinkOut_________________________________|Ack|________________________ > >What the data-book doesn't tell me is if the C011 can be used as shown >below so that overlapping ACK implemented on Transputer 2 will still >work. The resultant waveform would have to look like this:- > ______________________________________________________________ >LinkIn Data (11 bits)| Data (11 bits) |Data (11 bits) > _____________________ _____________________________ __________ >Q0-7 _____________________X_____________________________X__________ > _________ _______ >QValid ________________________/ \___________________/ > __________ _____ >QAck __________________________/ \__________________/ > ______________________________________________________________ >LinkOut_________________________________|Ack|________________________ > >The LinkOut of the C011 is not connected, so the last waveform on this >diagram is irrelevant, but is included for completeness. As can be >seen, the data is arriving at the LinkIn input before the C011 has had >time to signal that the previous byte has arrived, and set up all of >its Q0-7, QValid, and QAck signals. I know that this is a rather >unorthodox way of doing things, but I can see no other way around it. Mark Hill from inMoS replied to the message with the following:- -...around here (t/p group) it is believed that unsolicited acks are -ignored, so no hassles there. -Chances are that it would ignore the incoming byte since it would not expect -another before an ack was returned in the opposite direction which, even with -overlapped acks, would still take a long enough time to arrive so as to -prevent the sending transputer being able to transmit bytes non-stop. -The person who designed it has left the company and so I cannot ask -him. Sorry. Gary Porter of Bradford also replied with a few suggestions:- -It looks as if you will need to gate the LinkOut lines from the transputer -and the Link adapter to ensure correct operation. However, care must be taken -to ensure that no bi-directional transmissions are taking place or you could -have real problems. -...Monitor the LinkIn and LinkOut using ECL buffers (TTL - ECL) and store -the result in a fast FIFO, shift register or VRAM chip. The skew etc figures -should be OK, Meiko used this method to talk to their PC boards. Thanks for all of your suggestions. What I intend to do is to use FAST logic to gate the input link between two C011 chips. I am only using the input half of each chip, so the outputs do not need to be connected. The reason that I am still using a C011 is that it will handle ACKs as well as incoming data. I will need a state machine to control the switching between the C011s at the end of a data byte during its stop bit. I would have liked to use a shift register, to read in the data and dispense with the C011, but this requires the use of ECL which is not easily prototyped due to heat dissipation. After spending some time on calculating propagation delays I have decided to use a 16MHz clock derived from an 80MHz source to read the start bits of the data and then count out the remaining bits up to the stop bit. Initially I tried a 20MHz clock, but the delays through a registered PAL were too high to cope with this. This further ruled out the use of a fast shift register as the bit timings are now not correct. Any comments on this would be most welcome. Thanks again for all your help and patience in reading my postings, Dave. David I. Laurenson | Department of Computer Science | Edinburgh University King's Bldgs | JANET dil@uk.ac.ed.lfcs Mayfield Road, EDINBURGH U.K. |