[comp.sys.transputer] H-1\

ENGLE@A.ISI.EDU (11/28/89)

I would like to propose an exercise for the members of the net.  I'm not
sure if this is of interest or if it will be at all effective given that
the H-1 design is probably fairly solid by now.  But suppose we (the 
net community) undertake to design a successor to the T800.  I don't 
propose that we begin to argue over silicon fabrication processes, but
I think we could come up with a reasonable set of requirements, and we
could resolve many of the problems regarding more links vs. more
on-chip RAM, or a barrel shifter vs. some other CPU feature.  Perhaps with
some input from any VLSI people in the community we could also account for
some of the more fundamental issues of chip area, power requirements, etc.

What would this achieve?  For one, it may influence the H-1 design or its
successors, I trust that Inmos is listening to us (it would be stupid not to).
I think that anyone who commits to the transputer is trusting/hoping/worrying 
that Inmos will keep up with the more macho chips in the industry.  One could 
even advance the theory that the RISC concept is really a process of designing
CPU's with regard to the software that will use it rather than foisting 
crippled embedded controllers onto unsuspecting compiler writers (this is in 
regard to the 8008, I realize that this remark could be interpreted as an 
allusion to the T800 -- its not).  Also, it would be a tremendous 
demonstration of the potential of global communications technologies -- like 
the net -- to improve the state of the art.  Finally, if nothing else, we may 
begin to gain some insight into the upcoming H-1.  I suspect that if we were 
to all pool the disclosable facts we have been so artfully leaked, we might 
be able to put togethor a fairly good view of what H-1 would be -- again a 
consequence of the net community and this communications medium.

Regards,
Steven W. Engle
Senior AI Software Engineer
MIMD Systems, Inc.