randy@petfe.UUCP (Randy Banton) (10/10/85)
One reference I have seen from a vendor on metastabililty is from MMI. The title is "METASTABILITY, A study of the anomalous behavior of synchronizer circuits". The number on the back page is 3M08/84. In this study there are waveforms, and comparison of 74F374, 74LS374, and registered PALs. Someone also mentioned a study that Fairchild has published. I too have seen it, but I can't find a copy. I have also seen a paper from Motorola on 10K ECL. They artificially induced the metastable conditions to a MC10131 and MC10231. The report is dated July 27, 1973. Also, the AMD 29xxx family of registers are advertised as "metastable hardened" in the 1985 AMD Bipolar Microprocessor Logic and Interface data book. The explaination starts on page 8-1. Lastly, I have a reference from the 1972 IEEE conference with the ominous title "BEWARE THE SYNCHRONIZER". It also references 5 other papers. A specific caution about the VME bus (really a device). Be aware that the Motorola 68452 bus arbiter must have the external logic shown in the latest spec sheet for it to work correctly. With this external logic it works fine. Without this logic the Bus Grant output*s* may glitch (as in multiple grants), thus multiple masters think they have the bus (typically if they are edge sensitive to the grant). Get the picture? I discovered this working on a multi-processing system based on the VME bus and using the 68452 (without the external fix) as the bus arbiter. One processor would get the "real" grant and others would see the edge of the glitch, then the proceeded to trash the system. It typically would take 5 to 10 minutes before this happened.