DODGE@bio-medical-physics.aberdeen.ac.uk (03/19/91)
Buff Whelan <cnbs30%str-va@uk.ac.strath.cs> ......
#Wee burner on
I think this is your address, but as you don't include it in the
body of your mail message, I have had to de-cipher it from the mail
header, a non-trivial task.
Please, can people put their mail return address in the body of the
message.
#Wee burner off
.......asks:-
> A number of companies are currently putting together TRAMS for
> digital signal processing chips, such as the DSP 56000, and the
> newer Motorola 96000, Zoran chips and so on ....
>
> Why?
>
> What can the transputer offer DSP? .......................->
>
We (Bio-med Physics, Aberdeen Uni) are building a DSP Co-Processor for
our Transputer box (10 T8's plus a couple of T4's at present) based on
Plessey dedicated DSP chips. The board will be capable of performing
the FFT and other related transforms once complete.
The motivation for this is that DSP operations are sometimes only part
of an algorithm, hence DSP power can be applied to DSP tasks, and the
more 'general' computing power of the T network for other processing
tasks.
As an example, one application we hope to look at is transform
compression of images (medical mainly), where the transformation of
image blocks is the first step of the compression algorithm. Once each
block has been transformed, it can be passed on to other T's for
subsequent processing, such as data re-ordering, bit-allocation...
You may then say, 'well can't you run the transform on several processors
to obtain the same performance'? Maybe, but the calculated time
limiting factor of a 2-d transform < 256 squared is the ability of the
T to load and unload the DSP board. So although x number of T8's may
have the same MFLOP performance as the DSP board, it's not a lot of
good as the DSP processing would be finished before the data had been
distributed across the network.
Chris Dodge
<dodge@uk.ac.adbn.biomed>