[net.micro] 386 addressing modes

feustel@ihlpl.UUCP (Feustel) (11/24/85)

		(some of) 386 registers

	general regs			 seg regs

     +-----------------+		+--------+
eax  |        |   ax   |	cs	|        |
     +-----------------+		+--------+
ebx  |        |   bx   |	ss	|        |
     +-----------------+		+--------+
ecx  |        |   cx   |	ds	|        |
     +-----------------+		+--------+
edx  |        |   dx   |	es	|        |
     +-----------------+		+--------+
esi  |        |   si   |	fs	|        |
     +-----------------+		+--------+
edi  |        |   di   |	gs	|        |
     +-----------------+		+--------+
ebp  |        |   bp   |
     +-----------------+
esp  |        |   sp   |
     +-----------------+



     +-----------------+
eip  |        |   ip   |
     +-----------------+
efl  |        |   fl   |
     +-----------------+

---------------------386 addressing - 16-bit address mode-------------------------

 \ mod	00		01		10		11 - reg and r/m
  \
r/m							32-bit data	16-bit data
							override

							w=0	w=1	w=0	w=1

000	ds:[bx+si]	ds:[bx+si+d8]	ds:[bx+si+d16]	al	eax	al	ax
001	ds:[bx+di]	ds:[bx+di+d8]	ds:[bx+di+d16]	cl	ecx	cl	cx
010	ds:[bp+si]	ds:[bp+si+d8]	ds:[bp+si+d16]	dl	edx	dl	dx
011	ds:[bp+di]	ds:[bp+di+d8]	ds:[bp+di+d16]	bl	ebx	bl	bx
100	ds:[si]		ds:[si+d8]	ds:[si+d16]	ah	esp	ah	sp
101	ds:[di]		ss:[di+d8]	ss:[di+d16]	ch	ebp	ch	bp
110	ds:d16		ds:[bx+d8]	ds:[bx+d16]	dh	esi	dh	si
111	ds:[bx]		ds:[bp+d8]	ds:[bp+d16]	bh	edi	bh	di

---------------------386 addressing - 32-bit address mode-------------------------

 \ mod	00		01		10		11 - reg and r/m
  \
r/m							32-bit data	16-bit data
									override

							w=0	w=1	w=0	w=1

000	ds:[eax]	ds:[eax+d8]	ds:[eax+d32]	al	eax	al	ax
001	ds:[ecx]	ds:[ecx+d8]	ds:[eax+d32]	cl	ecx	cl	cx
010	ds:[edx]	ds:[edx+d8]	ds:[edx+d32]	dl	edx	dl	dx
011	ds:[ebx]	ds:[ebx+d8]	ds:[ebx+d32]	bl	ebx	bl	bx
100	s-i-b addressing mode 				ah	esp	ah	sp
101	ds:d32		ss:[ebp+d8]	ss:[ebp+d32]	ch	ebp	ch	bp
110	ds:[esi]	ds:[esi+d8]	ds:[esi+d32]	dh	esi	dh	si
111	ds:[edi]	ds:[edi+d8]	ds:[edi+d32]	bh	edi	bh	di

	s-i-b addressing mode

base/sir								sir

000		ds:[eax+sir]	ds:[eax+sir+d8]	ds:[eax+sir+d32]	eax
001		ds:[ecx+sir]	ds:[eax+sir+d8]	ds:[eax+sir+d32]	ecx
010		ds:[edx+sir]	ds:[edx+sir+d8]	ds:[edx+sir+d32]	edx
011		ds:[ebx+sir]	ds:[ebx+sir+d8]	ds:[ebx+sir+d32]	ebx
100		ss:[esp+sir]	ss:[esp+sir+d8]	ss:[esp+sir+d32]	no index reg
101		ss:[ebp+sir]	ss:[ebp+sir+d8]	ss:[ebp+sir+d32]	ebp
110		ds:[esi+sir]	ds:[esi+sir+d8]	ds:[esi+sir+d32]	esi
111		ds:[edi+sir]	ds:[edi+sir+d8]	ds:[edi+sir+d32]	edi


	ss	00	01	10	11
index
scale		x1	x2	x4	x8
factor