eugene@wilbur.nas.nasa.gov (Eugene N. Miya) (07/03/90)
Subject: High speed computing project
To: Distribution
From: David K. Kahaner ONRFE [kahaner@xroads.cc.u-tokyo.ac.jp]
Re: Conference of the Achievements of the National R & D Program
"High-Speed Computing System for Scientific and Technological Uses"
21 June 1990, Tsukuba Japan
Date: 3 July 1990
Abstract. The major topics at the Conference of the Achievements of the
National R & D Program "High-Speed Computing System for Scientific
and Technological Uses", held 6 June 1990, at the Electrotechnical
Laboratory in Tsukuba Japan are summarized.
Aspects of this projects were discussed in an earlier report, (Japanese
Government Science Structure and Computer Related Projects 21 June 1990).
This meeting was the formal termination of the National High Speed
Computing project. All the participating groups had an opportunity to
present summaries of their research. Most of these research activities
are already known in the scientific community through published papers,
visits by foreign specialists, attendance at meetings, etc. The
proceedings are in Japanese; we are having some of the more significant
papers translated. This report lists the major speakers and their
papers.
Please recall that this project jointly supports research at the ETL
government laboratory and at industrial, and the technical program was
divided into presentations that reflect that organization.
INTRODUCTORY REMARKS, K. Tamura (ETL)
1. HIGH SPEED LOGIC AND MEMORY
1.1 Josephson Junctiond Devices
Joint presentation by S. Hasuo (Fujitsu), U. Kawabe (Hitachi), &
Y. Wada (NEC)
A Josephson Computer: ETL-JC1, S. Takada (ETL)
Development of Josephson Junction Technology Using a New
Superconducting Material, A. Shoji, S. Kosaka, M. Aoyagi,
(ETL)
Development of Joshepson Logic Circuits, H. Nakagawa, I. Kurosawa,
M. Aoyagi (ETL)
A Memory Josephson Technology, I. Kurosawa, M. Aoyagi, H. Nakagawa (ETL)
Josephson System Technology--Multiple Phased Power Supply Method
and the Design of the ETL-JC1, Y. Okada, Y. Hamazaki (ETL)
Magnetic Penetration Depth of the Y-Ba-Cu-O Superconducting Films,
H. Akoh, Sakada (ETL)
1.2 High Electron Mobility Transistor Devices
Joint presentation by M. Abe (Fujitsu) & S. Nishi (Oki Electric)
1.3 GaAs Field Effect Transistor Devices
A New GaAs Transister Device, T. Sakamoto, K. Matusmoto, K.
Sakamoto (ETL)
Joint presentation by N. Toyoda (Toshiba), H. Sakuma (NEC), S.
Kayano (Mitsubishi Electric) & H. Yanazawa (Hitachi)
2. PARALLEL ARCHITECTURE & SOFTWARE
Distributed Parallel Processor for Satellite Image Processing, joint
presentation by T. Isonishi (Mitsubishi Electric), A.
Maeda (Toshiba) & N. Moriya (Oki Electric)
Dataflow Supercomputer SIGMA-1, T. Shimada, K. Hiraki, K. Nishida,
T. Sekiguchi (ETL)
High Level Language DFC-II, T. Sekiguchi, T. Shimada (ETL)
3. HIGH-SPEED PARALLEL PROCESSOR SYSTEMS
3.1 High-speed Parallel Processor, S. Hashimoto (Fujitsu)
3.2 Large Capacity High-speed Storage, N. Nishi (NEC)
3.3 Parallel Processing Programming Language, PHIL, F. Yamamoto (Hitachi)
4. Othe Research Activities, S. Suzuki (Fujitsu)
APPENDIX: List of Published Papers, List of Patents
-----------------END OF REPORT-------------------------------------------