[comp.os.os9] timing fix

-Yosemite Sam,_Roger Rabbit_) (02/08/89)

	After tinkering for a while with my coco III,I belive I've
	found the root cause of a lot of the timing problems in it.
	I tried most of the "sparklie"fixes to no avail.The scs gating
	fix might work for peripherals,but it treats the symptom and
	not the disease.
	Aparrently,RS wanted to save space and money by eliminating
	a NOR gate chip in the address decoder circuit.The address
	decoder(74ls138) controls cts,scs,and some of the memory
	decoding.On the original coco,a NOR gate was used to gate
	e clock and the c select line together.This was used for one
	enable(the other was tied active all the time).On the coco III,
	both enables are tied active all the time.This means the select 
	lines aren't allowed to settle before the output line is selected!
	I added a NOR gate to my coco III to duplicate the original coco's
	gating for the 74ls138.My performance peripherals dual mode
	controller now functions perfectly with my unmodified coco-xt
	and I have yet to see a single "sparklie".I'm not sure if this
	modification will work without the "A" GIME,but it seems to
	have done the trick for me.If anyone is interested,email me
	a message and I'll mail you more specific directions.If anyone
	uses this mod,I'd be interested to hear the results.


								vern

knudsen@ihlpl.ATT.COM (Knudsen) (02/09/89)

In article <8902080504.AA07308@decwrl.dec.com>, burke_vern@dneast.dec.com (Mah biscuits 're burnin'!-Yosemite Sam,_Roger Rabbit_) writes:

> 	I added a NOR gate to my coco III to duplicate the original coco's
> 	gating for the 74ls138.My performance peripherals dual mode

Thanks for posting this.  I'd been wondering about this timing nit
ever since I got the Tech Manual for my Coco 3.
I've been afraid to tinker with it, thinking that the extra gating
might mess something else up.  You have proven it won't.

Question:  Do you really need a separate NOR gate?  The '138
has three enables -- one positive, two negative -- that are internally
ANDed.  One of these is used for the pulse itself.  Now if one
of the negative enables is left over, shouldn't you be able to lift
its hard-wired ground and feed the enabling clock into it?

I'll have to check the schematic tonite.  Meanwhile, could you post
more details?  Thanks, mike k
-- 
Mike Knudsen  Bell Labs(AT&T)   att!ihlpl!knudsen
"Five hundred twelve K bytes of RAM ... out of control ... "

dnelson@umbio.MIAMI.EDU (Dru Nelson) (02/12/89)

> 
> 
> 								vern


I tried to mail you but it bounced.

I am a little out of it so please bear with me.  Does this fix the
problem with both the Burke and Burke and the dual mode controller?

Also, whats a sparklie?  How did you find this problem (oscilloscope,
schematic, logic analyzer, noticed missing chip?)  

If this fixes the Burke and Burke or makes the coco III fully
compatible with the older ones, what is the fix?


-- 
Dru Nelson                    UUCP: ....!uunet!gould!umbio!dnelson
Miami, Florida                 MCI: dnelson
                          Internet: dnelson%umbio@umigw.miami.edu