leff@smu.UUCP (Laurence Leff) (04/03/88)
California Institute of Technology Computer Science Department, 256-80 Pasadena, CA 91125 Technical Reports October 1987 Available from the Computer Science Department Library. Prices include postage and help to defray our printing and mailing costs. Publication Order Form If you wish to order any of the reports listed below, complete the form at the end of the list, and return it with your check or international money order (in U.S. dollars) payable to CALTECH. Prepayment is required for all materials. CS-TR-88-01 $3.00 C Programmer's Abbreviated Guide to Multicomputer Programming, Seitz, Charles, Jakov Seizovic and Wen-King Su 5258:TR:88 $3.00 Submicron Systems Architecture ARPA Semiannual Technical Report 5256:TR:87 $2.00 Synthesis Method for Self-timed VLSI Circuits, Martin, Alain current supply only: see Proc. ICCD'87: 1987 IEEE Int'l. Conf. on Computer Design, 224-229, Oct'87 5251:TR:87 $2.00 Conditional Knowledge as a Basis for Distributed Simulation, Chandy, K. Mani and Jay Misra 5250:TR:87 $10.00 Images, Numerical Analysis of Singularities and Shock Filters, PhD Thesis Rudin, Leonid Iakov 5249:TR:87 $6.00 Logic from Programming Language Semantics, PhD Thesis Choo, Young-il 5247:TR:87 $6.00 VLSI Concurrent Computation for Music Synthesis, PhD Thesis Wawrzynek, John 5246:TR:87 $3.00 Framework for Adaptive Routing Ngai, John Y and Charles L. Seitz 5244:TR:87 $3.00 Multicomputers Athas, William C and Charles L Seitz 5243:TR:87 $5.00 Resource-Bounded Category and Measure in Exponential Complexity Classes, PhD Thesis Lutz, Jack H 5242:TR:87 $8.00 Fine Grain Concurrent Computations, PhD Thesis Athas, William C. 5241:TR:87 $3.00 VLSI Mesh Routing Systems, MS Thesis Flaig, Charles M 5240:TR:87 $2.00 Submicron Systems Architecture ARPA Semiannual Technical Report 5239:TR:87 $3.00 Trace Theory and Systolic Computations Rem, Martin 5238:TR:87 $7.00 Incorporating Time in the New World of Computing System, MS Thesis Poh, Hean Lee 5236:TR:86 $4.00 Approach to Concurrent Semantics Using Complete Traces, MS Thesis Van Horn, Kevin S. 5235:TR:86 $4.00 Submicron Systems Architecture ARPA Semiannual Technical Report 5234:TR:86 $3.00 High Performance Implementation of Prolog Newton, Michael O 5233:TR:86 $3.00 Some Results on Kolmogorov-Chaitin Complexity, MS Thesis Schweizer, David Lawrence 5232:TR:86 $4.00 Cantor User Report Athas, W.C. and C. L. Seitz 5231:TR:86 $2.00 Deadlock-Free Message Routing in Multiprocessor Interconnection Networks Dally, William J and Charles L Seitz current supply only: see IEEE Transactions on Computers vol C-36 no 5, May 1987 5230:TR:86 $24.00 Monte Carlo Methods for 2-D Compaction, PhD Thesis Mosteller, R.C. 5229:TR:86 $4.00 anaLOG - A Functional Simulator for VLSI Neural Systems, MS Thesis Lazzaro, John 5228:TR:86 $3.00 On Performance of k-ary n-cube Interconection Networks, Dally, Wm. J 5227:TR:86 $18.00 Parallel Execution Model for Logic Programming, PhD Thesis Li, Pey-yun Peggy 5221:TR:86 $3.00 Sync Model: A Parallel Execution Method for Logic Programming Li, Pey-yun Peggy and Alain J. Martin current supply only: see Proc SLP'86 3rd IEEE Symp on Logic Programming Sept '86 5220:TR:86 $4.00 Submicron Systems Architecture ARPA Semiannual Technical Report 5215:TR:86 $2.00 How to Get a Large Natural Language System into a Personal Computer, Thompson, Bozena H. and Frederick B. Thompson 5214:TR:86 $2.00 ASK is Transportable in Half a Dozen Ways, Thompson, Bozena H. and Frederick B. Thompson 5212:TR:86 $2.00 On Seitz' Arbiter, Martin, Alain J 5210:TR:86 $2.00 Compiling Communicating Processes into Delay-Insensitive VLSI Circuits, Martin, Alain current supply only: see Distributed Computing v 1 no 4 (1986) 5209:TR:86 $11.00 VLSI Architecture for Concurrent Data Structures, PhD Thesis, Dally, William J. 5208:TR:86 $2.00 The Torus Routing Chip, Dally, William and Charles L Seitz current supply only: see Distr. Computing vol 1 no 4 1986 5207:TR:86 $2.00 Complete and Infinite Traces: A Descriptive Model of Computing Agents, van Horn, Kevin 5205:TR:85 $2.00 Two Theorems on Time Bounded Kolmogrov-Chaitin Complexity, Schweizer, David and Yaser Abu-Mostafa 5204:TR:85 $3.00 An Inverse Limit Construction of a Domain of Infinite Lists, Choo, Young-Il 5202:TR:85 $15.00 Submicron Systems Architecture, ARPA Semiannual Technical Report 5200:TR:85 $18.00 ANIMAC: A Multiprocessor Architecture for Real-Time Computer Animation, PhD thesis Whelan, Dan 5198:TR:85 $8.00 Neural Networks, Pattern Recognition and Fingerprint Hallucination, PhD thesis Mjolsness, Eric 5197:TR:85 $7.00 Sequential Threshold Circuits, MS thesis Platt, John 5196:TR:85 $5.00 ECL: An Experimental Concurrent Language, Athas, Bill 5195:TR:85 $3.00 New Generalization of Dekker's Algorithm for Mutual Exclusion, Martin, Alain J current supply only: see Information Processing Letters, 23, 295-297 (1986) 5194:TR:85 $5.00 Sneptree - A Versatile Interconnection Network, Li, Pey-yun Peggy and Alain J Martin 5193:TR:85 $2.00 Delay-insensitive Fair Arbiter Martin, Alain J current supply only: see Distr Computing 1:226-234 (1986) 5190:TR:85 $3.00 Concurrency Algebra and Petri Nets, Choo, Young-il 5189:TR:85 $10.00 Hierarchical Composition of VLSI Circuits, PhD Thesis Whitney, Telle 5185:TR:85 $11.00 Combining Computation with Geometry, PhD Thesis Lien, Sheue-Ling 5184:TR:85 $7.00 Placement of Communicating Processes on Multiprocessor Networks, MS Thesis Steele, Craig 5179:TR:85 $3.00 Sampling Deformed, Intersecting Surfaces with Quadtrees, MS Thesis, Von Herzen, Brian P. 5178:TR:85 $9.00 Submicron Systems Architecture, ARPA Semiannual Technical Report 5177:TR:85 $4.00 Hot-Clock nMOS, Proc. 1985 Chapel Hill Conference on VLSI, pp 1-17 Seitz, Charles, A H Frey, S Mattisson, S D Rabin, D A Speck, and J L A van de Snepscheut 5174:TR:85 $7.00 Balanced Cube: A Concurrent Data Structure, Dally, William J and Charles L Seitz 5172:TR:85 $6.00 Combined Logical and Functional Programming Language, Newton, Michael 5168:TR:84 $3.00 Object Oriented Architecture, Dally, Bill and Jim Kajiya 5165:TR:84 $4.00 Customizing One's Own Interface Using English as Primary Language, Thompson, B H and Frederick B Thompson 5164:TR:84 $13.00 ASK French - A French Natural Language Syntax, MS Thesis Sanouillet, Remy 5160:TR:84 $7.00 Submicron Systems Architecture, ARPA Semiannual Technical Report 5158:TR:84 $6.00 VLSI Architecture for Sound Synthesis, Wawrzynek, John and Carver Mead 5157:TR:84 $15.00 Bit-Serial Reed-Solomon Decoders in VLSI, PhD Thesis Whiting, Douglas 5148:TR:84 $4.00 Fair Mutual Exclusion with Unfair P and V Operations, Martin, Alain and Jerry Burch current supply only: see Information Processing Letters, 21, 97-100, (1985) 5147:TR:84 $4.00 Networks of Machines for Distributed Recursive Computations, Martin, Alain and Jan van de Snepscheut 5143:TR:84 $5.00 General Interconnect Problem, MS Thesis Ngai, John 5140:TR:84 $5.00 Hierarchy of Graph Isomorphism Testing, MS Thesis Chen, Wen-Chi 5139:TR:84 $4.00 HEX: A Hierarchical Circuit Extractor, MS Thesis Oyang, Yen-Jen 5137:TR:84 $7.00 Dialogue Designing Dialogue System, PhD Thesis Ho, Tai-Ping 5136:TR:84 $5.00 Heterogeneous Data Base Access, PhD Thesis Papachristidis, Alex 5135:TR:84 $7.00 Toward Concurrent Arithmetic, MS Thesis Chiang, Chao-Lin 5134:TR:84 $2.00 Using Logic Programming for Compiling APL, MS Thesis Derby, Howard 5133:TR:84 $13.00 Hierarchical Timing Simulation Model for Digital Integrated Circuits and Systems, PhD Thesis Lin, Tzu-mu 5132:TR:84 $10.00 Switch Level Fault Simulation of MOS Digital Circuits, MS Thesis Schuster, Mike 5130:TR:84 $3.00 LOG The Chipmunk Logic Simulator User's Guide, Gillespie, Dave 5129:TR:84 $5.00 Design of the MOSAIC Processor, MS Thesis Lutz, Chris 5128:TM:84 $3.00 Linguistic Analysis of Natural Language Communication with Computers, Thompson, Bozena H 5125:TR:84 $6.00 Supermesh, MS Thesis Su, Wen-king 5124:TR:84 $4.00 Probe: An Addition to Communication Primitives, Martin, Alain current supply only: see Information Processing Letters, 20, no 3, (1985) 5123:TR:84 $14.00 Mossim Simulation Engine Architecture and Design, Dally, Bill 5122:TR:84 $8.00 Submicron Systems Architecture, ARPA Semiannual Technical Report 5120:TM:84 $1.00 Mathematical Approach to Modeling the Flow, Johnsson, Lennart and Danny Cohen 5119:TM:84 $1.00 Integrative Approach to Engineering Data and Automatic Project Coordination, Segal, Richard 5118:TR:84 $2.00 SMART User's Guide, Ngai, John 5114:TM:84 $3.00 ASK As Window to the World, Thompson, Bozena, and Fred Thompson 5113:TR:84 $4.00 WoLery, Mead, Carver A 5112:TR:83 $22.00 Parallel Machines for Computer Graphics, PhD Thesis Ulner, Michael 5106:TM:83 $1.00 Ray Tracing Parametric Patches, Kajiya, James T 5105:TR:83 $2.00 Memory Management in the Programming Language ICL, Wawrzynek, John 5104:TR:83 $9.00 Graph Model and the Embedding of MOS Circuits, MS Thesis Ng, Tak-Kwong 5103:TR:83 $7.00 Submicron Systems Architecture, ARPA Semiannual Technical Report 5102:TR:83 $2.00 Experiments with VLSI Ensemble Machines, Seitz, Charles L 5101:TM:83 $1.00 Concurrent Fault Simulation of MOS Digital Circuits, Bryant, Randal E 5099:TM:83 $1.00 VLSI and the Foundations of Computation, Mead, Carver 5098:TM:83 $2.00 New Techniques for Ray Tracing Procedurally Defined Objects, Kajiya, James T 5097:TR:83 $4.00 Design of a Self-timed Circuit for Distributed Mutual Exclusion, Martin, Alain J current supply only: see Proc. Chapel Hill Conf. on VLSI, 245-259, May 1985 5094:TR:83 $2.00 Stochastic Estimation of Channel Routing Track Demand, Ngai, John 5093:TR:83 $1.00 Design of the MOSAIC Element, Lutz, Chris, Steve Rabin, Chuck Seitz and Don Speck 5092:TM:83 $2.00 Residue Arithmetic and VLSI, Chiang, Chao-Lin and Lennart Johnsson 5091:TR:83 $2.00 Race Detection in MOS Circuits by Ternary Simulation, Bryant, Randal E 5090:TR:83 $9.00 Space-Time Algorithms: Semantics and Methodology, PhD Thesis Chen, Marina Chien-mei 5089:TR:83 $10.00 Signal Delay in General RC Networks with Application to Timing Simulation of Digital Integrated Circuits, Lin, Tzu-Mu and Carver A Mead 5086:TR:83 $4.00 VLSI Combinator Reduction Engine, MS Thesis Athas, William C Jr 5084:TM:83 $3.00 Tree Machine: An Evaluation of Strategies for Reducing Program Loading Time, Li, Pey-yun Peggy, and Lennart Johnsson 5082:TR:83 $10.00 Hardware Support for Advanced Data Management Systems, PhD Thesis Neches, Philip 5081:TR:83 $4.00 RTsim - A Register Transfer Simulator, MS Thesis Lam, Jimmy 5080:TR:83 $4.00 Distributed Mutual Exclusion on a Ring of Processes, Martin, Alain current supply only: see Science of Computer Programming, 5, (1985) 5079:TR:83 $2.00 Highly Concurrent Algorithms for Solving Linear Systems of Equations, Johnsson, Lennart 5078:TR:83 $5.00 Submicron Systems Architecture, ARPA Semiannual Technical Report 5075:TR:83 $2.00 General Proof Rule for Procedures in Predicate Transformer Semantics, Martin, Alain current supply only: see Acta Informatica 20, 301-313, (1983) 5074:TR:83 $10.00 Robust Sentence Analysis and Habitability, Trawick, David 5073:TR:83 $12.00 Automated Performance Optimization of Custom Integrated Circuits, PhD Thesis Trimberger, Steve 5068:TM:83 $1.00 Hierarchical Simulator Based on Formal Semantics, Proc Third Caltech Conf on VLSI Chen, Marina and Carver Mead 5065:TR:82 $3.00 Switch Level Model and Simulator for MOS Digital Systems, Bryant, Randal E 5055:TR:82 $5.00 FIFO Buffering Transceiver: A Communication Chip Set for Multiprocessor Systems, MS Thesis Ng, Charles H 5054:TM:82 $3.00 Introducing ASK, A Simple Knowledgeable System, Conf on App'l Natural Language Processing Thompson, Bozena H and Frederick B Thompson 5052:TR:82 $8.00 Submicron Systems Architecture, ARPA Semiannual Technical Report 5051:TM:82 $2.00 Knowledgeable Contexts for User Interaction, Proc Nat'l Computer Conference Thompson, Bozena, Frederick B Thompson, and Tai-Ping Ho 5047:TR:82 $3.00 Torus: An Exercise in Constructing a Processing Surface, Proc 2nd Caltech Conference on VLSI Martin, Alain 5046:TR:82 $3.00 in Axiomatic Definition of Synchronization Primitives Martin, Alain current supply only: see Acta Informatica 16, pp 219-235 (1981) 5045:TM:82 $3.00 in Distributed Implementation Method for Parallel Programming Martin, Alain see Proc Information Processing '80 5044:TR:82 $10.00 Hierarchical Nets: A Structured Petri Net Approach to Concurrency, Choo, Young-Il 5038:TM:82 $4.00 New Channel Routing Algorithm, Chan, Wan S 5035:TR:82 $9.00 Type Inference in a Declarationless, Object-Oriented Language, MS Thesis Holstege, Eric 5034:TR:82 $12.00 Hybrid Processing, PhD Thesis Carroll, Chris 5033:TR:82 $4.00 MOSSIM II: A Switch-Level Simulator for MOS LSI User's Manual, Schuster, Mike, Randal Bryant and Doug Whiting 5029:TM:82 $4.00 POOH User's Manual, Whitney, Telle 5021:TR:82 $5.00 Earl: An Integrated Circuit Design Language, MS Thesis Kingsley, Chris 5018:TM:82 $2.00 Filtering High Quality Text for Display on Raster Scan Devices, Kajiya, Jim and Mike Ullner 5017:TM:82 $2.00 Ray Tracing Parametric Patches, Kajiya, Jim 5016:TR:82 $4.00 Bristle Blocks - Scrutinized and Analyzed, McNair, Richard and Monroe Miller 5015:TR:82 $15.00 VLSI Computational Structures Applied to Fingerprint Image Analysis, Megdal, Barry 5014:TR:82 $15.00 Extension of Object-Oriented Languages to a Homogeneous, Concurrent Architecture, PhD Thesis Lang, Charles R Jr 5012:TM:82 $2.00 Switch-Level Modeling of MOS Digital Circuits, Bryant, Randal 5001:TR:82 $2.00 Minimum Propagation Delays in VLSI , IEEE J Solid State Circuits Mead, Carver, and Martin Rem 5000:TR:82 $6.00 Self-Timed Chip Set for Multiprocessor Communication, MS Thesis Whiting, Douglas 4777:TR:82 $7.00 Techniques for Testing Integrated Circuits, PhD Thesis DeBenedictis, Erik P 4724:TR:82 $2.00 Concurrent, Asynchronous Garbage Collection Among Cooperating Processors, Lang, Charles R 4716:TM:82 $4.00 Rectangular Area Filling Display System Architecture, Whelan, Dan 4684:TR:82 $3.00 Characterization of Deadlock Free Resource Contentions, Chen, Marina, Martin Rem, and Ronald Graham 4675:TR:81 $7.00 Switching Dynamics, MS Thesis Lewis, Robert K 4655:TR:81 $20.00 Proc Second Caltech Conf on VLSI, Seitz, Charles, ed. 4654:TR:81 $12.00 Versatile Ethernet Interface, MS Thesis Whelan, Dan 4653:TR:81 $10.00 Toward A Theorem Proving Architecture, MS Thesis Lien, Sheue-Ling 4618:TM:81 $5.00 Tree Machine Operating System, Li, Peggy 4600:TM:81 $3.00 Notation for Designing Restoring Logic Circuitry, Proc Second Caltech Conf on VLSI Rem, Martin, and Carver Mead 4530:TR:81 $20.00 Silicon Compilation, PhD Thesis Johannsen, Dave 4527:TR:81 $11.00 Communicative Databases, PhD Thesis Yu, Kwang-I 4521:TR:81 $8.00 Lambda Logic, MS Thesis Rudin, Leonid 4517:TR:81 $7.00 Serial Log Machine, MS Thesis Li, Peggy 4407:TM:82 $3.00 Experimental Composition Tool, Mosteller, Richard C 4332:TR:81 $3.00 RLAP, Version 1.0, A Chip Assembly Tool, Mosteller, R 4320:TR:81 $7.00 Hierarchical Design Rule Checker, MS Thesis Whitney, Telle 4317:TR:81 $10.00 REST - A Leaf Cell Design System, MS Thesis Mosteller, Richard C 4298:TR:81 $7.00 From Geometry to Logic, MS Thesis Lin, Tzu-mu 4287:TR:81 $3.00 Computational Arrays for Band Matrix Equations Johnsson, Lennart 4204:TR:78 $8.00 16-Bit LSI Digital Multiplier, EE Thesis Masumoto, R T 4191:TR:81 $4.00 Towards A Formal Treatment of VLSI Arrays, Proc Second Caltech Conf on VLSI Johnsson, Lennart S, Uri Weiser, D Cohen, and Alan L Davis 4128:TM:81 $2.00 Shifting to a Higher Gear in a Natural Language System, Thompson, Fred and B Thompson 3975:TM:80 $3.00 Rapidly Extendable Natural Language, Thompson, B H and Fred B Thompson 3762:TR:80 $8.00 Software Design System, PhD Thesis Hess, Gideon 3761:TR:80 $7.00 Fault Tolerant Integrated Circuit Memory, PhD Thesis Barton, Tony 3760:TR:80 $10.00 Tree Machine: A Highly Concurrent Computing Environment, PhD Thesis Browning, Sally 3759:TR:80 $10.00 Homogeneous Machine, PhD Thesis Locanthi, Bart 3710:TR:80 $10.00 Understanding Hierarchical Design, PhD Thesis Rowson, James 3364:TR:79 $8.00 Stack Data Engine, Efland, G and R C Mosteller 3340:TR:79 $26.00 Proc. Caltech Conference on VLSI (1979), Seitz, Charles, ed 2276:TM:78 $12.00 Language Processor and a Sample Language, Ayres, Ron 2275:TR:70 $17.00 Formal Methods in the Foundations of Science, PhD Thesis Randall, David Lawrence Caltech Computer Science Technical Reports Please fill in your name, address and amount enclosed below: Name__________________________________________________________________________ Address_______________________________________________________________________ City_______________________ State_________ Zip_________ Country_______________ Amount enclosed $ ____________________________________________________________ ______Please check here if you wish to be included on our mailing list. ______Please check here for any change of address. ______Please check here if you would prefer to have future publications lists sent to your e-mail address. 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