dyer@STILTON.WISC.EDU (Chuck Dyer) (08/17/87)
CAPAMI '87
1987 WORKSHOP ON COMPUTER ARCHITECTURE FOR
PATTERN ANALYSIS AND MACHINE INTELLIGENCE
Seattle, Washington
October 5 - 7, 1987
CAPAMI '87 will focus on new architectures and associated algorithms for
computer vision, image processing, and artificial intelligence. This
workshop is a successor of the Computer Architecture for Pattern Analysis
and Image Database Management workshops. The program, given below, consists
of high-quality refereed papers, invited speakers, and panel sessions on
the design and implementation of parallel architectures and algorithms for
pattern analysis and machine intelligence. Invited speakers are: Tom
Knight, MIT, George Reeke, Rockefeller University, and Masatsugu Kidode,
Toshiba.
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WORKSHOP ORGANIZATION
General Chair: Steve Tanimoto, University of Washington
Program Chair: Chuck Dyer, University of Wisconsin
Finance Chair: Yongmin Kim, University of Washington
Local Arrangements Chair: Charlotte Lin, Boeing
Program Committee: Chris Brown Jim Little
Michael Duff Azriel Rosenfeld
Bob Haralick Jorge Sanz
Ramesh Jain Len Uhr
John Kender Jon Webb
H. T. Kung
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REGISTRATION
Mail check payable to CAPAMI '87 (U.S. currency only) to:
CAPAMI '87 Registration
c/o Ms. Lori Tollefsen
Department of Computer Science, FR-35
University of Washington
Seattle, WA 98195
IEEE Member Non-Member Student
Registration
Before Sept. 8 $110 $140 $60
After Sept. 8 $135 $170 $80
Banquet $ 30 $ 30 $30
Note: Student fee includes proceedings. Requests for refunds must be
received in writing before Sept. 15. Cancellation fee is $15.
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HOTEL RESERVATION INFORMATION
Reservations must be received by Sept. 14. Mention CAPAMI '87 when making
reservations. To guarantee your reservation for late arrival (after 6 PM),
either a check for one night's lodging or appropriate credit card information
must be given to the hotel.
Westin Hotel
1900 Fifth Avenue
Seattle, WA 98101
(206) 728-1000 / (800) 228-3000 / Telex: 152900
____________________________________________________________________________
FOR MORE INFORMATION
CAPAMI '87
c/o IEEE Computer Society
1730 Massachusetts Ave., N.W.
Washington, DC 20036-1903
(202) 371-0101
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ADVANCE PROGRAM
MONDAY, October 5
9:00 - 10:00 Invited Talk: TBA
Tom Knight, Massachusetts Institute of Technology
10:00 - 10:30 Coffee Break
10:30 - 12:10 Session 1: Hypercube-based Architectures and Algorithms
Hypercube and Shuffle-Exchange Algorithms for Image
Component Labeling, R. Cypher, J. L. C. Sanz, and L. Snyder
How to Program the Connection Machine for Computer Vision,
J. J. Little, G. Blelloch, and T. Cass
Optical Cellular Logic Architectures based on Binary Image
Algebra, K. S. Huang, B. K. Jenkins, and A. A. Sawchuk
A Parallel Algorithm for Region Labeling, M. H. Sunwoo, B.
S. Baroody, and J. K. Aggarwal
12:10 - 1:45 Lunch Break
1:45 - 3:25 Session 2: Shared-Memory Algorithms
Parallel Algorithms for Dynamic Systems with known
Trajectories, L. Boxer and R. Miller
Shared Memory Algorithms and the Medial Axis Transform, S.
Chandran and D. Mount
Formula Dissection: A Parallel Algorithm for Constraint
Satisfaction, S. Kasif, J. H. Reif, and D. D. Sherlekar
On the Complexity of Incremental Parallel Computations in
Artificial Intelligence, A. Delcher and S. Kasif
3:25 - 4:00 Coffee Break
4:00 - 5:40 Session 3: Linear and Pipeline Architectures and Algorithms
Progress on the Prototype PIPE, R. Goldenberg, W. C. Lau, A.
She, and A. M. Waxman
Heuristic Scheduling Algorithms for PIPE, C. V. Stewart
and C. R. Dyer
Computing the Hough Transform on a Scan Line Array
Processor, A. L. Fisher and P. T. Highnam
A VLSI Implementation of PPPE for Real-Time Image Processing
in Radon Space - Work in Progress, W. B. Baringer, B. C.
Richards, R. W. Broderson, J. L. C. Sanz, and D. Petkovic
TUESDAY, October 6
9:00 - 10:00 Invited Talk: Selection and Perceptual Categorization: New
Architectures for Nonalgorithmic Networks
George Reeke, Rockefeller University
10:00 - 10:30 Coffee Break
10:30 - 12:10 Session 4: Mesh-based Algorithms
Parallel Algorithms for Line Detection on a Mesh, C. Guerra
and S. Hambrusch
Solving the Depth Interpolation Problem on a Parallel
Architecture, D. J. Choi and J. R. Kender
The Hough Transform has O(n) Complexity on SIMD n x n Mesh
Array Architectures, R. Cypher, J. L. C. Sanz, and L.
Snyder
EREW PRAM and Mesh Connected Computer Algorithms for Image
Component Labeling, R. Cypher, J. L. C. Sanz, and L. Snyder
12:10 - 1:45 Lunch Break
1:45 - 3:25 Session 5: Pyramid and Hierarchical Architectures and
Algorithms
Real Time Synchronization in a multi-SIMD Massively
Parallel Machine, P. Clermont and A. Merigot
Iconic Image Analysis with the Pipeline Pyramid Machine
(PPM), P. J. Burt and G. S. van der Wal
Dynamically Quantized Pyramids for Hough Vote Collection,
R. P. Blanford
A VLSI Architecture for a Neurocomputer using Higher-Order
Predicates, R. Geller and D. Hammerstrom
3:25 - 4:00 Coffee Break
4:00 - 5:30 Panel: Which Parallel Architectures are Useful/Useless for
Vision Algorithms
Moderator: Jorge Sanz, IBM Almaden Research Laboratory
6:00 - 10:00 Banquet: Boat cruise on Puget Sound to Blake Island with a
Northwest-Indian-style, Alder-smoked salmon dinner
WEDNESDAY, October 7
9:00 - 10:00 Invited Talk: Image Processing Machines in Japan
Masatsugu Kidode, Toshiba Research and Development Center
10:00 - 10:30 Coffee Break
10:30 - 12:10 Session 6: Mesh-based Architectures and Algorithms
Geometric Algorithms on HMESH Architecture, S. B. Chalasani
and C. S. Raghavendra
Polymorphic-Torus: A new Architecture for Vision Computation,
H. Li and M. Maresca
The OFC Enhanced Mesh Architecture: A Performance Study, A. M.
Jrad and R. W. Hall
Image Processing on VLSI Architectures with Reduced Hardware,
H. M. Alnuweiri and V. K. P. Kumar
12:10 - 1:45 Lunch Break
1:45 - 3:00 Session 7: Loosely-Coupled MIMD Architectures and Algorithms
Some Aspects of an Image Understanding Database for an
Intelligent Operating System, F. Weil, L. Jamieson, and E.
Delp
HBA Vision Architecture: Built and Benchmarked, R. S. Wallace
and M. D. Howard
A Binary-Image Processing Method using Run Length
Representation, K. Nakabayashi
3:00 - 3:30 Coffee Break
3:30 - 5:00 Panel: Research on Pattern Analysis and Machine Intelligence
Architectures in Japan and the U.S.
Moderators: Masatsugu Kidode, Toshiba Research and
Development Center, and Steven L. Tanimoto, University
of Washington
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