[comp.ai.digest] applications of AI techniques to Testability in VLSI design?

mhs@ht.ai.mit.EDU (Mark Shirley) (03/17/88)

   Does anyone out there have any references or information on
   applications of AI techniques to Testability in VLSI design?

			Thanks in advance,
			      Gabriel.



AI and Design for Testability:

    @InProceedings(shirley87,
	Key="shirley87",
	Author="Shirley, M., P. Wu, R. Davis, G. Robinson",
	Title="A Synergistic Combination of Test Generation and Design for
          Testability",
	Organization="The Computer Society of the IEEE",
	BookTitle="International Testing Conference 1987 Proceedings",
	Year="1987",
	Pages="701-711")

    In the last couple of years, the testing conference has had AI sessions

    \bibitem{abadir85}
    Magdy~S. Abadir and Melvin~A. Breuer.
    \newblock A Knowledge-Based System for Designing Testable VLSI Chips.
    \newblock {\it IEEE Design \& Test of Computers}, 56--68, August 1985.

AI and Test Generation:

    @InProceedings(Shirley86,
	key="Shirley86",
	Author="Shirley, M.",
	Title="Generating Tests by Exploiting Designed Behavior",
	Organization=AAAI,
	BookTitle="Proceedings of the Fifth National Conference on
          Artificial Intelligence (AAAI-86)",
	Year=1986,
	Month=August,
	Pages="884-890")

    @InProceedings(Singh86,
	key="Singh86",
	Author="Singh, N.",
	Title="Saturn: An Automatic Test Generation System for
          Digital Circuits",
	Organization=AAAI,
	BookTitle="Proceedings of the Fifth National Conference on
          Artificial Intelligence (AAAI-86)",
	Year=1986,
	Month=August,
	Pages="778-783")

Related DFT and Test Generation work:

    \bibitem{horstmann}
    Paul~W. Horstmann.
    \newblock Design for Testability using Logic Programming.
    \newblock In {\it Proceedings of 1983 International Test Conference},
      pages~706--713, 1983.

    @PhDThesis(Lai81,
	Key="Lai",
	Author="Lai, Kwok-Woon",
	FullAuthor="Larry Kwok-Woon Lai",
	Title="Functional Testing of Digital Systems",
	School=CMU,
	Number="CMU-CS-148",
	Month="December",
	Year="1981")

    \bibitem{williams73}
    M.~J.~Y. Williams et al.
    \newblock Enhancing testability of large-scale integrated circuits via test
     points and additional logic.
    \newblock {\it IEEE trans on Computers}, C-22(1):46--60, January 1973.