MVILAIN@G.BBN.COM (Marc Vilain) (11/04/88)
BBN Science Development Program
AI Seminar Series Lecture
SPECIALIZATION IS FOR INSECTS
Tom Knight
MIT Artificial Intelligence Lab
(tk@AI.AI.MIT.EDU)
BBN Labs
10 Moulton Street
2nd floor large conference room
10:30 am, Tuesday 8 November
The chaos of the last decade in parallel computer architecture
is largely due to the premature specialization of parallel computer
architectures to support particular programming models. The careful
choice of the correct primitives to support in hardware leads to a
general purpose parallel architecture which is capable of supporting a
wide variety of programming models.
This talk will argue that low latency communication emerges as
the essential component in parallel processor design, and will
demonstrate how to use low latency communication to support other
programming models such as data level parallelism and coherent shared
memory in large processor arrays.
We are now designing a very low latency, high bandwidth, fault
tolerant communications network, called Transit. It forms the
communications infrastructure - the replacement of the bus - for a high
speed MIMD processor array which can be programmed using a wide variety
of parallel models. Transit achieves its high performance through a
interdisciplinary approach to the problem of communications latency.
The packaging of Transit is done using near isotropic density
three dimensional wiring, allowing much tighter packing of components,
and routing of wires on a 3-D grid. The network is direct contact
liquid cooled with Fluorinert. The use of custom VLSI pad drivers and
receivers provides very high speed signalling between chips. The
topology of the network provides self-routing, fault tolerant, short
pipeline delay communications between pairs of processors. And finally,
the design of the processor itself allows high speed message dispatching
and low latency context switch.
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