page@swan.ulowell.edu (Bob Page) (10/27/88)
Submitted-by: dillon@cory.berkeley.edu (Matt Dillon)
Posting-number: Volume 2, Issue 27
Archive-name: languages/dasm20.1
# This is a shell archive. Remove anything before this line
# then unpack it by saving it in a file and typing "sh file"
# (Files unpacked will be owned by you and have default permissions).
# This archive contains the following files:
# src/Makefile
# src/globals.c
# src/.edrc
# src/exp.c
# src/mne6303.c
# test/suite6502.asm
# test/suite68HC11.asm
# test/suite68705.asm
# test/suite6303.asm
# test/example.asm
#
if `test ! -d src`
then
mkdir src
echo "mkdir src"
fi
if `test ! -s src/Makefile`
then
echo "writing src/Makefile"
cat > src/Makefile << '\Rogue\Monster\'
# DASM -small systems cross assembler
# (c)Copyright 1988 Matthew Dillon, All Rights Reserved.
#
# This Makefile is for AZTEC C on an Amiga.
#
# ASSUMES UNIX OR AMIGA
DASM = srcc:dasm
FTOHEX = srcc:ftohex
CFLAGS= +L
SRC1= main.c
SRC2= ops.c
SRC3= globals.c
SRC4= exp.c
SRC5= symbols.c
SRC6= mne6303.c
SRC7= mne6502.c
SRC8= mne68705.c
SRC9= mne6811.c
OBJ1= vd0:main.o
OBJ2= vd0:ops.o
OBJ3= vd0:globals.o
OBJ4= vd0:exp.o
OBJ5= vd0:symbols.o
OBJ6= vd0:mne6303.o
OBJ7= vd0:mne6502.o
OBJ8= vd0:mne68705.o
OBJ9= vd0:mne6811.o
OBJS= $(OBJ1) $(OBJ2) $(OBJ3) $(OBJ4) $(OBJ5) $(OBJ6) $(OBJ7) $(OBJ8) $(OBJ9)
SRCS= $(SRC1) $(SRC2) $(SRC3) $(SRC4) $(SRC5) $(SRC6) $(SRC7) $(SRC8) $(SRC9)
all: $(DASM) $(FTOHEX)
$(DASM): $(OBJS)
ln -W +Q $(OBJS) -lsup32 -lc32 -O $(DASM)
$(FTOHEX): ftohex.c
cc $(CFLAGS) ftohex.c -o T:ftohex.o
ln +Q T:ftohex.o -lsup32 -lc32 -O $(FTOHEX)
delete T:ftohex.o
example:
dasm example.asm -oram:example.out -lram:example.list -f2
ftohex 2 ram:example.out ram:example.hex
$(OBJ1): $(SRC1)
cc $(CFLAGS) $(SRC1) -o $(OBJ1)
$(OBJ2): $(SRC2)
cc $(CFLAGS) $(SRC2) -o $(OBJ2)
$(OBJ3): $(SRC3)
cc $(CFLAGS) $(SRC3) -o $(OBJ3)
$(OBJ4): $(SRC4)
cc $(CFLAGS) $(SRC4) -o $(OBJ4)
$(OBJ5): $(SRC5)
cc $(CFLAGS) $(SRC5) -o $(OBJ5)
$(OBJ6): $(SRC6)
cc $(CFLAGS) $(SRC6) -o $(OBJ6)
$(OBJ7): $(SRC7)
cc $(CFLAGS) $(SRC7) -o $(OBJ7)
$(OBJ8): $(SRC8)
cc $(CFLAGS) $(SRC8) -o $(OBJ8)
$(OBJ9): $(SRC9)
cc $(CFLAGS) $(SRC9) -o $(OBJ9)
\Rogue\Monster\
else
echo "will not over write src/Makefile"
fi
if [ `wc -c src/Makefile | awk '{printf $1}'` -ne 1537 ]
then
echo `wc -c src/Makefile | awk '{print "Got " $1 ", Expected " 1537}'`
fi
if `test ! -s src/globals.c`
then
echo "writing src/globals.c"
cat > src/globals.c << '\Rogue\Monster\'
/*
* GLOBALS.C
*
* (c)Copyright 1988, Matthew Dillon, All Rights Reserved.
*
*/
#include "asm.h"
extern void v_list(), v_include(), v_seg(), v_dc(), v_ds(),
v_org(), v_rorg(), v_rend(), v_align(), v_subroutine(),
v_equ(), v_eqm(), v_set(), v_macro(), v_endm(), v_mexit(),
v_ifconst(), v_ifnconst(), v_if(), v_else(),
v_endif(), v_repeat(), v_repend(), v_err(), v_hex(), v_trace();
extern void v_end(), v_echo(), v_processor();
SYMBOL *SHash[SHASHSIZE]; /* symbol hash table */
MNE *MHash[MHASHSIZE]; /* mnemonic hash table */
INCFILE *Incfile; /* include file stack */
REPLOOP *Reploop; /* repeat loop stack */
SEGMENT *Seglist; /* segment list */
SEGMENT *Csegment; /* current segment */
IFSTACK *Ifstack; /* IF/ELSE/ENDIF stack */
ubyte *Av[256]; /* up to 256 arguments */
ubyte Avbuf[512];
ubyte MsbOrder = 1;
uword Mnext;
char Inclevel;
uword Mlevel;
ulong Localindex; /* to generate local variables */
ulong Lastlocalindex;
ulong Processor;
ubyte Xdebug, Xtrace;
ubyte Outputformat;
ulong Redo, Redo_why;
ulong Redo_eval; /* infinite loop detection only */
char ListMode = 1;
ulong CheckSum; /* output data checksum */
ubyte F_format = 1;
ubyte F_verbose;
char *F_outfile = "a.out";
char *F_listfile;
char *F_symfile;
char *F_temppath = "ram:";
FILE *FI_listfile;
FILE *FI_temp;
ubyte Fisclear;
ulong Plab, Pflags;
uword Adrbytes[] = { 1, 2, 3, 2, 2, 2, 3, 3, 3, 2, 2, 2, 3, 1, 1, 2, 3 };
uword Cvt[] = { 0, 2, 0, 6, 7, 8, 9, 0, 0, 0, 0, 0, 0, 4, 5, 0, 0 };
uword Opsize[] = { 0, 1, 2, 1, 1, 1, 2, 2, 2, 2, 1, 1, 2, 0, 0, 1, 1 };
MNE Ops[] = {
{ NULL, v_list , "list", 0, 0 },
{ NULL, v_include , "include", 0, 0 },
{ NULL, v_seg , "seg", 0, 0 },
{ NULL, v_hex , "hex", 0, 0 },
{ NULL, v_err , "err", 0, 0 },
{ NULL, v_dc , "dc", 0, 0 },
{ NULL, v_ds , "ds", 0, 0 },
{ NULL, v_dc , "dv", 0, 0 },
{ NULL, v_end , "end", 0, 0 },
{ NULL, v_trace , "trace", 0, 0 },
{ NULL, v_org , "org", 0, 0 },
{ NULL, v_rorg , "rorg", 0, 0 },
{ NULL, v_rend , "rend", 0, 0 },
{ NULL, v_align , "align", 0, 0 },
{ NULL, v_subroutine, "subroutine", 0, 0 },
{ NULL, v_equ , "equ", 0, 0 },
{ NULL, v_eqm , "eqm", 0, 0 },
{ NULL, v_set , "set", 0, 0 },
{ NULL, v_macro , "mac", MF_IF, 0 },
{ NULL, v_endm , "endm", 0, 0 },
{ NULL, v_mexit , "mexit", 0, 0 },
{ NULL, v_ifconst , "ifconst", MF_IF, 0 },
{ NULL, v_ifnconst, "ifnconst", MF_IF, 0 },
{ NULL, v_if , "if", MF_IF, 0 },
{ NULL, v_else , "else", MF_IF, 0 },
{ NULL, v_endif , "endif", MF_IF, 0 },
{ NULL, v_endif , "eif", MF_IF, 0 },
{ NULL, v_repeat , "repeat", MF_IF, 0 },
{ NULL, v_repend , "repend", MF_IF, 0 },
{ NULL, v_echo , "echo", 0, 0 },
{ NULL, v_processor,"processor", 0, 0 },
NULL
};
\Rogue\Monster\
else
echo "will not over write src/globals.c"
fi
if [ `wc -c src/globals.c | awk '{printf $1}'` -ne 3363 ]
then
echo `wc -c src/globals.c | awk '{print "Got " $1 ", Expected " 3363}'`
fi
if `test ! -s src/.edrc`
then
echo "writing src/.edrc"
cat > src/.edrc << '\Rogue\Monster\'
map s-f9 (saveas vd0:dasm/\$filename)
\Rogue\Monster\
else
echo "will not over write src/.edrc"
fi
if [ `wc -c src/.edrc | awk '{printf $1}'` -ne 38 ]
then
echo `wc -c src/.edrc | awk '{print "Got " $1 ", Expected " 38}'`
fi
if `test ! -s src/exp.c`
then
echo "writing src/exp.c"
cat > src/exp.c << '\Rogue\Monster\'
/*
* EXP.C
*
* (c)Copyright 1988, Matthew Dillon, All Rights Reserved.
*
* Handle expression evaluation and addressing mode decode.
*
* NOTE! If you use the string field in an expression you must clear
* the SYM_MACRO and SYM_STRING bits in the flags before calling
* freesymbollist()!
*/
#include "asm.h"
extern void doop(), evaltop(), stackarg();
extern void op_mult(), op_div(), op_mod(), op_add(), op_sub(),
op_shiftleft(), op_shiftright(), op_greater(), op_greatereq(),
op_smaller(), op_smallereq(), op_eqeq(), op_noteq(),
op_andand(), op_oror(), op_xor(), op_and(), op_or(),
op_negate(), op_invert(), op_not();
extern void op_takelsb(), op_takemsb(), op_question();
extern ubyte *pushsymbol(), *pushstr(), *pushbin(), *pushoct(),
*pushdec(), *pushhex(), *pushchar();
extern short alphanum();
/*
* evaluate an expression. Figure out the addressing mode:
*
* implied
* #val immediate
* val zero page or absolute
* val,x zero,x or absolute,x
* val,y zero,y or absolute,y
* (val) indirect
* (val,x) zero indirect x
* (val),y zero indirect y
*
* exp, exp,.. LIST of expressions
*
* an absolute may be returned as zero page
* a relative may be returned as zero page or absolute
*
* unary: - ~ ! < >
* binary: (^)(* / %)(+ -)(>> <<)(& |)(`)(&& ||)(== != < > <= >=)
*
* values: symbol, octal, decimal, $hex, %binary, 'c "str"
*
*/
#define MAXOPS 32
#define MAXARGS 64
ubyte Argflags[MAXARGS];
long Argstack[MAXARGS];
ubyte *Argstring[MAXARGS];
short Oppri[MAXOPS];
void (*Opdis[MAXOPS])();
uword Argi, Opi, Lastwasop;
uword Argibase, Opibase;
SYMBOL *
eval(str)
register char *str;
{
register SYMBOL *base, *cur;
uword oldargibase = Argibase;
uword oldopibase = Opibase;
uword scr;
Argibase = Argi;
Opibase = Opi;
Lastwasop = 1;
base = cur = allocsymbol();
while (*str) {
if (Xdebug)
printf("char '%c'\n", *str);
switch(*str) {
case ' ':
case '\n':
++str;
break;
case '~':
if (Lastwasop)
doop(op_invert, 128);
else
asmerr(0,0);
++str;
break;
case '*':
doop(op_mult, 20);
++str;
break;
case '/':
doop(op_div, 20);
++str;
break;
case '%':
if (Lastwasop) {
str = (char *)pushbin(str+1);
} else {
doop(op_mod, 20);
++str;
}
break;
case '?': /* 10 */
doop(op_question, 10);
++str;
break;
case '+': /* 19 */
doop(op_add, 19);
++str;
break;
case '-': /* 19: - (or - unary) */
if (Lastwasop) {
doop(op_negate, 128);
} else {
doop(op_sub, 19);
}
++str;
break;
case '>': /* 18: >> << 17: > >= <= < */
if (Lastwasop) {
doop(op_takemsb, 128);
++str;
break;
}
if (str[1] == '>') {
doop(op_shiftright, 18);
++str;
} else if (str[1] == '=') {
doop(op_greatereq, 17);
++str;
} else {
doop(op_greater, 17);
}
++str;
break;
case '<':
if (Lastwasop) {
doop(op_takelsb, 128);
++str;
break;
}
if (str[1] == '<') {
doop(op_shiftleft, 18);
++str;
} else if (str[1] == '=') {
doop(op_smallereq, 17);
++str;
} else {
doop(op_smaller, 17);
}
++str;
break;
case '=': /* 16: == (= same as ==) */
if (str[1] == '=')
++str;
doop(op_eqeq, 16);
++str;
break;
case '!': /* 16: != */
if (Lastwasop) {
doop(op_not, 128);
} else {
doop(op_noteq, 16);
++str;
}
++str;
break;
case '&': /* 15: & 12: && */
if (str[1] == '&') {
doop(op_andand, 12);
++str;
} else {
doop(op_and, 15);
}
++str;
break;
case '^': /* 14: ^ */
doop(op_xor, 14);
++str;
break;
case '|': /* 13: | 11: || */
if (str[1] == '|') {
doop(op_oror, 11);
++str;
} else {
doop(op_or, 13);
}
++str;
break;
case '[': /* eventually an argument */
if (Opi == MAXOPS)
puts("too many ops");
else
Oppri[Opi++] = 0;
++str;
break;
case ']':
while(Opi != Opibase && Oppri[Opi-1])
evaltop();
if (Opi != Opibase)
--Opi;
++str;
if (Argi == Argibase) {
puts("']' error, no arg on stack");
break;
}
if (*str == 'd') { /* STRING CONVERSION */
char buf[32];
++str;
if (Argflags[Argi-1] == 0) {
sprintf(buf,"%ld",Argstack[Argi-1]);
Argstring[Argi-1] = strcpy(malloc(strlen(buf)+1),buf);
}
}
break;
case '#':
cur->addrmode = AM_IMM8;
++str;
break;
case '(':
cur->addrmode = AM_INDWORD;
++str;
break;
case ')':
if (cur->addrmode == AM_INDWORD && str[1] == ',' && (str[2]|0x20) == 'y') {
cur->addrmode = AM_INDBYTEY;
str += 2;
}
++str;
break;
case ',':
while(Opi != Opibase)
evaltop();
Lastwasop = 1;
scr = str[1]|0x20; /* to lower case */
if (cur->addrmode == AM_INDWORD && scr == 'x' && !alphanum(str[2])) {
cur->addrmode = AM_INDBYTEX;
++str;
} else if (scr == 'x' && !alphanum(str[2])) {
cur->addrmode = AM_0X;
++str;
} else if (scr == 'y' && !alphanum(str[2])) {
cur->addrmode = AM_0Y;
++str;
} else {
register SYMBOL *new = allocsymbol();
cur->next = new;
--Argi;
if (Argi < Argibase)
asmerr(0,0);
if (Argi > Argibase)
asmerr(0,0);
cur->value = Argstack[Argi];
cur->flags = Argflags[Argi];
if (cur->string= (ubyte *)Argstring[Argi]) {
cur->flags |= SYM_STRING;
if (Xdebug)
printf("STRING: %s\n", cur->string);
}
cur = new;
}
++str;
break;
case '$':
str = (char *)pushhex(str+1);
break;
case '\'':
str = (char *)pushchar(str+1);
break;
case '\"':
str = (char *)pushstr(str+1);
break;
default:
if (*str == '0')
str = (char *)pushoct(str);
else {
if (*str > '0' && *str <= '9')
str = (char *)pushdec(str);
else
str = (char *)pushsymbol(str);
}
break;
}
}
while(Opi != Opibase)
evaltop();
if (Argi != Argibase) {
short add = 0;
--Argi;
cur->value = Argstack[Argi];
cur->flags = Argflags[Argi];
if (cur->string= (ubyte *)Argstring[Argi]) {
cur->flags |= SYM_STRING;
if (Xdebug)
printf("STRING: %s\n", cur->string);
}
if (base->addrmode == 0)
base->addrmode = AM_BYTEADR;
}
if (Argi != Argibase || Opi != Opibase)
asmerr(0,0);
Argi = Argibase;
Opi = Opibase;
Argibase = oldargibase;
Opibase = oldopibase;
return(base);
}
short
alphanum(c)
{
return ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z') || (c >= '0' && c <= '9'));
}
void
evaltop()
{
if (Xdebug)
printf("evaltop @(A,O) %d %d\n", Argi, Opi);
if (Opi <= Opibase) {
asmerr(0,0);
Opi = Opibase;
return;
}
--Opi;
if (Oppri[Opi] == 128) {
if (Argi < Argibase + 1) {
asmerr(0,0);
Argi = Argibase;
return;
}
--Argi;
(*Opdis[Opi])(Argstack[Argi], Argflags[Argi]);
} else {
if (Argi < Argibase + 2) {
asmerr(0,0);
Argi = Argibase;
return;
}
Argi -= 2;
(*Opdis[Opi])(Argstack[Argi], Argstack[Argi+1], Argflags[Argi], Argflags[Argi+1]);
}
}
void
stackarg(val, flags, ptr1)
long val;
short flags;
ubyte *ptr1;
{
ubyte *str = NULL;
if (Xdebug)
printf("stackarg %ld (@%d)\n", val, Argi);
Lastwasop = 0;
if (flags & SYM_STRING) {
register ubyte *ptr = ptr1;
register ubyte *new;
register uword len;
val = len = 0;
while (*ptr && *ptr != '\"') {
val = (val << 8) | *ptr;
++ptr;
++len;
}
new = malloc(len + 1);
bmov(ptr1, new, len);
new[len] = 0;
flags &= ~SYM_STRING;
str = new;
}
Argstack[Argi] = val;
Argstring[Argi] = str;
Argflags[Argi] = flags;
if (++Argi == MAXARGS) {
puts("stackarg: maxargs stacked");
Argi = Argibase;
}
while (Opi != Opibase && Oppri[Opi-1] == 128)
evaltop();
}
void
doop(func, pri)
void (*func)();
{
if (Xdebug)
puts("doop");
Lastwasop = 1;
if (Opi == Opibase || pri == 128) {
if (Xdebug)
printf("doop @ %d unary\n", Opi);
Opdis[Opi] = func;
Oppri[Opi] = pri;
++Opi;
return;
}
while (Opi != Opibase && Oppri[Opi-1] && pri <= Oppri[Opi-1])
evaltop();
if (Xdebug)
printf("doop @ %d\n", Opi);
Opdis[Opi] = func;
Oppri[Opi] = pri;
++Opi;
if (Opi == MAXOPS) {
puts("doop: too many operators");
Opi = Opibase;
}
return;
}
void
op_takelsb(v1, f1)
long v1;
{
stackarg(v1 & 0xFFL, f1);
}
void
op_takemsb(v1, f1)
long v1;
{
stackarg((v1 >> 8) & 0xFF, f1);
}
void
op_negate(v1, f1)
long v1;
{
stackarg(-v1, f1);
}
void
op_invert(v1, f1)
long v1;
{
stackarg(~v1, f1);
}
void
op_not(v1, f1)
long v1;
{
stackarg((long)!v1, f1);
}
void
op_mult(v1, v2, f1, f2)
long v1, v2;
{
stackarg(v1 * v2, f1|f2);
}
void
op_div(v1, v2, f1, f2)
long v1, v2;
{
if (f1|f2) {
stackarg(0L, f1|f2);
return;
}
if (v2 == 0) {
puts("division by zero");
stackarg(0L, 0);
} else {
stackarg(v1 / v2, 0);
}
}
void
op_mod(v1, v2, f1, f2)
long v1, v2;
{
if (f1|f2) {
stackarg(0L, f1|f2);
return;
}
if (v2 == 0)
stackarg(v1, 0);
else
stackarg(v1 % v2, 0);
}
void
op_question(v1, v2, f1, f2)
long v1, v2;
{
if (f1)
stackarg(0L, f1);
else
stackarg((long)((v1) ? v2 : 0), ((v1) ? f2 : 0));
}
void
op_add(v1, v2, f1, f2)
long v1, v2;
{
stackarg(v1 + v2, f1|f2);
}
void
op_sub(v1, v2, f1, f2)
long v1, v2;
{
stackarg(v1 - v2, f1|f2);
}
void
op_shiftright(v1, v2, f1, f2)
long v1, v2;
{
if (f1|f2)
stackarg(0L, f1|f2);
else
stackarg((long)(v1 >> v2), 0);
}
void
op_shiftleft(v1, v2, f1, f2)
long v1, v2;
{
if (f1|f2)
stackarg(0L, f1|f2);
else
stackarg((long)(v1 << v2), 0);
}
void
op_greater(v1, v2, f1, f2)
long v1, v2;
{
stackarg((long)(v1 > v2), f1|f2);
}
void
op_greatereq(v1, v2, f1, f2)
long v1, v2;
{
stackarg((long)(v1 >= v2), f1|f2);
}
void
op_smaller(v1, v2, f1, f2)
long v1, v2;
{
stackarg((long)(v1 < v2), f1|f2);
}
void
op_smallereq(v1, v2, f1, f2)
long v1, v2;
{
stackarg((long)(v1 <= v2), f1|f2);
}
void
op_eqeq(v1, v2, f1, f2)
long v1, v2;
{
stackarg((long)(v1 == v2), f1|f2);
}
void
op_noteq(v1, v2, f1, f2)
long v1, v2;
{
stackarg((long)(v1 != v2), f1|f2);
}
void
op_andand(v1, v2, f1, f2)
long v1, v2;
{
if ((!f1 && !v1) || (!f2 && !v2)) {
stackarg(0L, 0);
return;
}
stackarg(1L, f1|f2);
}
void
op_oror(v1, v2, f1, f2)
long v1, v2;
{
if ((!f1 && v1) || (!f2 && v2)) {
stackarg(1L, 0);
return;
}
stackarg(0L, f1|f2);
}
void
op_xor(v1, v2, f1, f2)
long v1, v2;
{
stackarg(v1^v2, f1|f2);
}
void
op_and(v1, v2, f1, f2)
long v1, v2;
{
stackarg(v1&v2, f1|f2);
}
void
op_or(v1, v2, f1, f2)
long v1, v2;
{
stackarg(v1|v2, f1|f2);
}
ubyte *
pushchar(str)
char *str;
{
if (*str) {
stackarg((long)*str, 0);
++str;
} else {
stackarg((long)' ', 0);
}
return((ubyte *)str);
}
ubyte *
pushhex(str)
char *str;
{
register long val = 0;
for (;; ++str) {
if (*str >= '0' && *str <= '9') {
val = (val << 4) + (*str - '0');
continue;
}
if ((*str >= 'a' && *str <= 'f') || (*str >= 'A' && *str <= 'F')) {
val = (val << 4) + ((*str&0x1F) + 9);
continue;
}
break;
}
stackarg(val, 0);
return((ubyte *)str);
}
ubyte *
pushoct(str)
char *str;
{
register long val = 0;
while (*str >= '0' && *str <= '7') {
val = (val << 3) + (*str - '0');
++str;
}
stackarg(val, 0);
return((ubyte *)str);
}
ubyte *
pushdec(str)
char *str;
{
register long val = 0;
while (*str >= '0' && *str <= '9') {
val = (val * 10) + (*str - '0');
++str;
}
stackarg(val, 0);
return((ubyte *)str);
}
ubyte *
pushbin(str)
char *str;
{
register long val = 0;
while (*str == '0' || *str == '1') {
val = (val << 1) | (*str - '0');
++str;
}
stackarg(val, 0);
return((ubyte *)str);
}
ubyte *
pushstr(str)
char *str;
{
stackarg(0L, SYM_STRING, str);
while (*str && *str != '\"')
++str;
if (*str == '\"')
++str;
return((ubyte *)str);
}
ubyte *
pushsymbol(str)
ubyte *str;
{
register SYMBOL *sym;
register ubyte *ptr;
ubyte macro = 0;
for (ptr = str;
*ptr == '_' ||
*ptr == '.' ||
(*ptr >= 'a' && *ptr <= 'z') ||
(*ptr >= 'A' && *ptr <= 'Z') ||
(*ptr >= '0' && *ptr <= '9');
++ptr
);
if (ptr == str) {
asmerr(9,0);
printf("char = '%c' %d (-1: %d)\n", *str, *str, *(str-1));
if (F_listfile)
fprintf(FI_listfile, "char = '%c' code %d\n", *str, *str);
return((ubyte *)str+1);
}
if (sym = findsymbol(str, ptr - str)) {
if (sym->flags & SYM_UNKNOWN)
++Redo_eval;
if (sym->flags & SYM_MACRO) {
macro = 1;
sym = eval(sym->string);
}
if (sym->flags & SYM_STRING)
stackarg(0L, SYM_STRING, sym->string);
else
stackarg(sym->value, sym->flags & SYM_UNKNOWN);
sym->flags |= SYM_REF|SYM_MASREF;
if (macro)
freesymbollist(sym);
} else {
stackarg(0L, SYM_UNKNOWN);
sym = createsymbol(str, ptr - str);
sym->flags = SYM_REF|SYM_MASREF|SYM_UNKNOWN;
++Redo_eval;
}
return(ptr);
}
\Rogue\Monster\
else
echo "will not over write src/exp.c"
fi
if [ `wc -c src/exp.c | awk '{printf $1}'` -ne 13218 ]
then
echo `wc -c src/exp.c | awk '{print "Got " $1 ", Expected " 13218}'`
fi
if `test ! -s src/mne6303.c`
then
echo "writing src/mne6303.c"
cat > src/mne6303.c << '\Rogue\Monster\'
/*
* MNE6303.C
*
* (c)Copyright 1988, Matthew Dillon, All Rights Reserved.
*/
#include "asm.h"
extern void v_mnemonic();
/*
* IMP IMM8 IMM16 BYTE BYTEX BYTEY WORD WORDX WORDY REL (,x) (),y (WORD)
* 0 1 2 3 4 5 6 7 8 9 10 11 12
*
* 0,x 0,y BIT BITBRA
* 13 14 15 16
*/
MNE Mne6803[] = {
{ NULL, v_mnemonic, "aba", 0, AF_IMP,
{ 0x1B }},
{ NULL, v_mnemonic, "abx", 0, AF_IMP,
{ 0x3A }},
{ NULL, v_mnemonic, "adca", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x89, 0x99, 0xA9, 0xB9 }},
{ NULL, v_mnemonic, "adcb", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC9, 0xD9, 0xE9, 0xF9 }},
{ NULL, v_mnemonic, "adda", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x8B, 0x9B, 0xAB, 0xBB }},
{ NULL, v_mnemonic, "addb", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xCB, 0xDB, 0xEB, 0xFB }},
{ NULL, v_mnemonic, "addd", 0, AF_IMM16|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC3, 0xD3, 0xE3, 0xF3 }},
{ NULL, v_mnemonic, "anda", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x84, 0x94, 0xA4, 0xB4 }},
{ NULL, v_mnemonic, "andb", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC4, 0xD4, 0xE4, 0xF4 }},
{ NULL, v_mnemonic, "bita", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x85, 0x95, 0xA5, 0xB5 }},
{ NULL, v_mnemonic, "bitb", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC5, 0xD5, 0xE5, 0xF5 }},
{ NULL, v_mnemonic, "bra", 0, AF_REL, { 0x20 }},
{ NULL, v_mnemonic, "brn", 0, AF_REL, { 0x21 }},
{ NULL, v_mnemonic, "bcc", 0, AF_REL, { 0x24 }},
{ NULL, v_mnemonic, "bhs", 0, AF_REL, { 0x24 }},
{ NULL, v_mnemonic, "bcs", 0, AF_REL, { 0x25 }},
{ NULL, v_mnemonic, "blo", 0, AF_REL, { 0x25 }},
{ NULL, v_mnemonic, "beq", 0, AF_REL, { 0x27 }},
{ NULL, v_mnemonic, "bge", 0, AF_REL, { 0x2C }},
{ NULL, v_mnemonic, "bgt", 0, AF_REL, { 0x2E }},
{ NULL, v_mnemonic, "bhi", 0, AF_REL, { 0x22 }},
{ NULL, v_mnemonic, "ble", 0, AF_REL, { 0x2F }},
{ NULL, v_mnemonic, "bls", 0, AF_REL, { 0x23 }},
{ NULL, v_mnemonic, "blt", 0, AF_REL, { 0x2D }},
{ NULL, v_mnemonic, "bmi", 0, AF_REL, { 0x2B }},
{ NULL, v_mnemonic, "bne", 0, AF_REL, { 0x26 }},
{ NULL, v_mnemonic, "bvc", 0, AF_REL, { 0x28 }},
{ NULL, v_mnemonic, "bvs", 0, AF_REL, { 0x29 }},
{ NULL, v_mnemonic, "bpl", 0, AF_REL, { 0x2A }},
{ NULL, v_mnemonic, "bsr", 0, AF_REL, { 0x8D }},
{ NULL, v_mnemonic, "clc", 0, AF_IMP, { 0x0C }},
{ NULL, v_mnemonic, "cli", 0, AF_IMP, { 0x0E }},
{ NULL, v_mnemonic, "clv", 0, AF_IMP, { 0x0A }},
{ NULL, v_mnemonic, "sec", 0, AF_IMP, { 0x0D }},
{ NULL, v_mnemonic, "sei", 0, AF_IMP, { 0x0F }},
{ NULL, v_mnemonic, "sev", 0, AF_IMP, { 0x0B }},
{ NULL, v_mnemonic, "tap", 0, AF_IMP, { 0x06 }},
{ NULL, v_mnemonic, "tpa", 0, AF_IMP, { 0x07 }},
{ NULL, v_mnemonic, "clr", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x6F, 0x7F }},
{ NULL, v_mnemonic, "clra", 0, AF_IMP, { 0x4F }},
{ NULL, v_mnemonic, "clrb", 0, AF_IMP, { 0x5F }},
{ NULL, v_mnemonic, "cmpa", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x81, 0x91, 0xA1, 0xB1 }},
{ NULL, v_mnemonic, "cmpb", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC1, 0xD1, 0xE1, 0xF1 }},
{ NULL, v_mnemonic, "cba", 0, AF_IMP, { 0x11 }},
{ NULL, v_mnemonic, "com", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x63, 0x73 }},
{ NULL, v_mnemonic, "coma", 0, AF_IMP, { 0x43 }},
{ NULL, v_mnemonic, "comb", 0, AF_IMP, { 0x53 }},
{ NULL, v_mnemonic, "neg", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x60, 0x70 }},
{ NULL, v_mnemonic, "nega", 0, AF_IMP, { 0x40 }},
{ NULL, v_mnemonic, "negb", 0, AF_IMP, { 0x50 }},
{ NULL, v_mnemonic, "daa", 0, AF_IMP, { 0x19 }},
{ NULL, v_mnemonic, "dec", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x6A, 0x7A }},
{ NULL, v_mnemonic, "deca", 0, AF_IMP, { 0x4A }},
{ NULL, v_mnemonic, "decb", 0, AF_IMP, { 0x5A }},
{ NULL, v_mnemonic, "eora", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x88, 0x98, 0xA8, 0xB8 }},
{ NULL, v_mnemonic, "eorb", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC8, 0xD8, 0xE8, 0xF8 }},
{ NULL, v_mnemonic, "inc", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x6C, 0x7C }},
{ NULL, v_mnemonic, "inca", 0, AF_IMP, { 0x4C }},
{ NULL, v_mnemonic, "incb", 0, AF_IMP, { 0x5C }},
{ NULL, v_mnemonic, "jmp", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x6E, 0x7E }},
{ NULL, v_mnemonic, "jsr", 0, AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x9D, 0xAD, 0xBD }},
{ NULL, v_mnemonic, "ldaa", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x86, 0x96, 0xA6, 0xB6 }},
{ NULL, v_mnemonic, "ldab", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC6, 0xD6, 0xE6, 0xF6 }},
{ NULL, v_mnemonic, "ldd", 0, AF_IMM16|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xCC, 0xDC, 0xEC, 0xFC }},
{ NULL, v_mnemonic, "mul", 0, AF_IMP, { 0x3D }},
{ NULL, v_mnemonic, "nop", 0, AF_IMP, { 0x01 }},
{ NULL, v_mnemonic, "oraa",0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x8A, 0x9A, 0xAA, 0xBA }},
{ NULL, v_mnemonic, "orab", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xCA, 0xDA, 0xEA, 0xFA }},
{ NULL, v_mnemonic, "psha", 0, AF_IMP, { 0x36 }},
{ NULL, v_mnemonic, "pshb", 0, AF_IMP, { 0x37 }},
{ NULL, v_mnemonic, "pshx", 0, AF_IMP, { 0x3C }},
{ NULL, v_mnemonic, "pulx", 0, AF_IMP, { 0x38 }},
{ NULL, v_mnemonic, "pula", 0, AF_IMP, { 0x32 }},
{ NULL, v_mnemonic, "pulb", 0, AF_IMP, { 0x33 }},
{ NULL, v_mnemonic, "rol", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x69, 0x79 }},
{ NULL, v_mnemonic, "rola", 0, AF_IMP, { 0x49 }},
{ NULL, v_mnemonic, "rolb", 0, AF_IMP, { 0x59 }},
{ NULL, v_mnemonic, "ror", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x66, 0x76 }},
{ NULL, v_mnemonic, "rora", 0, AF_IMP, { 0x46 }},
{ NULL, v_mnemonic, "rorb", 0, AF_IMP, { 0x56 }},
{ NULL, v_mnemonic, "rti", 0, AF_IMP, { 0x3B }},
{ NULL, v_mnemonic, "rts", 0, AF_IMP, { 0x39 }},
{ NULL, v_mnemonic, "swi", 0, AF_IMP, { 0x3F }},
{ NULL, v_mnemonic, "wai", 0, AF_IMP, { 0x3E }},
{ NULL, v_mnemonic, "asl", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x68, 0x78 }},
{ NULL, v_mnemonic, "lsl", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x68, 0x78 }},
{ NULL, v_mnemonic, "asla", 0, AF_IMP, { 0x48 }},
{ NULL, v_mnemonic, "aslb", 0, AF_IMP, { 0x58 }},
{ NULL, v_mnemonic, "asld", 0, AF_IMP, { 0x05 }},
{ NULL, v_mnemonic, "lsla", 0, AF_IMP, { 0x48 }}, /* same thing */
{ NULL, v_mnemonic, "lslb", 0, AF_IMP, { 0x58 }},
{ NULL, v_mnemonic, "lsld", 0, AF_IMP, { 0x05 }},
{ NULL, v_mnemonic, "asr", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x67, 0x77 }},
{ NULL, v_mnemonic, "asra", 0, AF_IMP, { 0x47 }},
{ NULL, v_mnemonic, "asrb", 0, AF_IMP, { 0x57 }},
{ NULL, v_mnemonic, "cpx", 0, AF_IMM16|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x8C, 0x9C, 0xAC, 0xBC }},
{ NULL, v_mnemonic, "dex", 0, AF_IMP, { 0x09 }},
{ NULL, v_mnemonic, "des", 0, AF_IMP, { 0x34 }},
{ NULL, v_mnemonic, "inx", 0, AF_IMP, { 0x08 }},
{ NULL, v_mnemonic, "ins", 0, AF_IMP, { 0x31 }},
{ NULL, v_mnemonic, "ldx", 0, AF_IMM16|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xCE, 0xDE, 0xEE, 0xFE }},
{ NULL, v_mnemonic, "lds", 0, AF_IMM16|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x8E, 0x9E, 0xAE, 0xBE }},
{ NULL, v_mnemonic, "lsr", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x64, 0x74 }},
{ NULL, v_mnemonic, "lsra", 0, AF_IMP, { 0x44 }},
{ NULL, v_mnemonic, "lsrb", 0, AF_IMP, { 0x54 }},
{ NULL, v_mnemonic, "lsrd", 0, AF_IMP, { 0x04 }},
{ NULL, v_mnemonic, "staa", 0, AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x97, 0xA7, 0xB7 }},
{ NULL, v_mnemonic, "stab", 0, AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xD7, 0xE7, 0xF7 }},
{ NULL, v_mnemonic, "std", 0, AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xDD, 0xED, 0xFD }},
{ NULL, v_mnemonic, "sts", 0, AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x9F, 0xAF, 0xBF }},
{ NULL, v_mnemonic, "stx", 0, AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xDF, 0xEF, 0xFF }},
{ NULL, v_mnemonic, "suba", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x80, 0x90, 0xA0, 0xB0 }},
{ NULL, v_mnemonic, "subb", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC0, 0xD0, 0xE0, 0xF0 }},
{ NULL, v_mnemonic, "subd", 0, AF_IMM16|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x83, 0x93, 0xA3, 0xB3 }},
{ NULL, v_mnemonic, "sba", 0, AF_IMP, { 0x10 }},
{ NULL, v_mnemonic, "sbca", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0x82, 0x92, 0xA2, 0xB2 }},
{ NULL, v_mnemonic, "sbcb", 0, AF_IMM8|AF_BYTEADR|AF_BYTEADRX|AF_WORDADR,
{ 0xC2, 0xD2, 0xE2, 0xF2 }},
{ NULL, v_mnemonic, "tab", 0, AF_IMP, { 0x16 }},
{ NULL, v_mnemonic, "tba", 0, AF_IMP, { 0x17 }},
{ NULL, v_mnemonic, "tst", 0, AF_BYTEADRX|AF_WORDADR,
{ 0x6D, 0x7D }},
{ NULL, v_mnemonic, "tsta", 0, AF_IMP, { 0x4D }},
{ NULL, v_mnemonic, "tstb", 0, AF_IMP, { 0x5D }},
{ NULL, v_mnemonic, "tsx", 0, AF_IMP, { 0x30 }},
{ NULL, v_mnemonic, "txs", 0, AF_IMP, { 0x35 }},
NULL
};
MNE MneHD6303[] = {
{ NULL, v_mnemonic, "slp", 0, AF_IMP, { 0x1A }},
{ NULL, v_mnemonic, "aim", 0, AF_BYTEADR|AF_BYTEADRX,
{ 0x71, 0x61 }},
{ NULL, v_mnemonic, "oim", 0, AF_BYTEADR|AF_BYTEADRX,
{ 0x72, 0x62 }},
{ NULL, v_mnemonic, "eim", 0, AF_BYTEADR|AF_BYTEADRX,
{ 0x75, 0x65 }},
{ NULL, v_mnemonic, "tim", 0, AF_BYTEADR|AF_BYTEADRX,
{ 0x7B, 0x6B }},
{ NULL, v_mnemonic, "xgdx", 0, AF_IMP, { 0x18 }},
NULL
};
\Rogue\Monster\
else
echo "will not over write src/mne6303.c"
fi
if [ `wc -c src/mne6303.c | awk '{printf $1}'` -ne 9596 ]
then
echo `wc -c src/mne6303.c | awk '{print "Got " $1 ", Expected " 9596}'`
fi
if `test ! -d test`
then
mkdir test
echo "mkdir test"
fi
if `test ! -s test/suite6502.asm`
then
echo "writing test/suite6502.asm"
cat > test/suite6502.asm << '\Rogue\Monster\'
; TEST ADDRESSING MODES
processor 6502
org 0
adc #1
adc 1
adc 1,x
adc 1,y ;absolute
adc 1000
adc 1000,x
adc 1000,y
adc (1,x)
adc (1),y
and #1
and 1
and 1,x
and 1,y ;absolute
and 1000
and 1000,x
and 1000,y
and (1,x)
and (1),y
asl
asl 1
asl 1,x
asl 1000
asl 1000,x
bcc .
bcs .
beq .
bit 1
bit 1000
bmi .
bne .
bpl .
brk
bvc .
bvs .
clc
cld
cli
clv
cmp #1
cmp 1
cmp 1,x
cmp 1,y ;absolute
cmp 1000
cmp 1000,x
cmp 1000,y
cmp (1,x)
cmp (1),y
cpx #1
cpx 1
cpx 1000
cpy #1
cpy 1
cpy 1000
dec 1
dec 1,x
dec 1000
dec 1000,x
dex
dey
eor #1
eor 1
eor 1,x
eor 1,y ;absolute
eor 1000
eor 1000,x
eor 1000,y
eor (1,x)
eor (1),y
inc 1
inc 1,x
inc 1000
inc 1000,x
inx
iny
jmp 1 ;absolute
jmp 1000
jmp (1) ;absolute
jmp (1000)
jsr 1 ;absolute
jsr 1000
lda #1
lda 1
lda 1,x
lda 1,y ;absolute
lda 1000
lda 1000,x
lda 1000,y
lda (1,x)
lda (1),y
ldx #1
ldx 1
ldx 1,y
ldx 1000
ldx 1000,y
ldy #1
ldy 1
ldy 1,x
ldy 1000
ldy 1000,x
lsr
lsr 1
lsr 1,x
lsr 1000
lsr 1000,x
nop
ora #1
ora 1
ora 1,x
ora 1,y ;absolute
ora 1000
ora 1000,x
ora 1000,y
ora (1,x)
ora (1),y
pha
php
pla
plp
rol
rol 1
rol 1,x
rol 1000
rol 1000,x
ror
ror 1
ror 1,x
ror 1000
ror 1000,x
rti
rts
sbc #1
sbc 1
sbc 1,x
sbc 1,y ;absolute
sbc 1000
sbc 1000,x
sbc 1000,y
sbc (1,x)
sbc (1),y
sec
sed
sei
sta 1
sta 1,x
sta 1,y ;absolute
sta 1000
sta 1000,x
sta 1000,y
sta (1,x)
sta (1),y
stx 1
stx 1,y
stx 1000
sty 1
sty 1,x
sty 1000
tax
tay
tsx
txa
txs
tya
\Rogue\Monster\
else
echo "will not over write test/suite6502.asm"
fi
if [ `wc -c test/suite6502.asm | awk '{printf $1}'` -ne 1645 ]
then
echo `wc -c test/suite6502.asm | awk '{print "Got " $1 ", Expected " 1645}'`
fi
if `test ! -s test/suite68HC11.asm`
then
echo "writing test/suite68HC11.asm"
cat > test/suite68HC11.asm << '\Rogue\Monster\'
; TEST ADDRESSING MODES
processor 68HC11
org 0
aba
abx
aby
adca #1
adca 1
adca 1000
adca 1,x
adca 1,y
adcb #1
adcb 1
adcb 1000
adcb 1,x
adcb 1,y
adda #1
adda 1
adda 1000
adda 1,x
adda 1,y
addb #1
addb 1
addb 1000
addb 1,x
addb 1,y
addd #1000
addd 1
addd 1000
addd 1,x
addd 1,y
anda #1
anda 1
anda 1000
anda 1,x
anda 1,y
andb #1
andb 1
andb 1000
andb 1,x
andb 1,y
asla
aslb
asl 1 ;extended
asl 1000
asl 1,x
asl 1,y
asld
asra
asrb
asr 1 ;extended
asr 1000
asr 1,x
asr 1,y
bcc .
bclr 1, $11
bclr 1,x ,$22
bclr 1,y ,$33
bcs .
beq .
bge .
bgt .
bhi .
bhs .
bita #1
bita 1
bita 1000
bita 1,x
bita 1,y
bitb #1
bitb 1
bitb 1000
bitb 1,x
bitb 1,y
ble .
blo .
bls .
blt .
bmi .
bne .
bpl .
bra .
brclr 1, $11, .
brclr 1,x , $22, .
brclr 1,y , $33, .
brn .
brset 1, $11, .
brset 1,x , $22, .
brset 1,y , $33, .
bset 1, $11
bset 1,x, $22
bset 1,y, $33
bsr .
bvc .
bvs .
cba
clc
cli
clra
clrb
clr 1 ; extended
clr 1000
clr 1,x
clr 1,y
clv
cmpa #1
cmpa 1
cmpa 1000
cmpa 1,x
cmpa 1,y
cmpb #1
cmpb 1
cmpb 1000
cmpb 1,x
cmpb 1,y
coma
comb
com 1 ; extended
com 1000
com 1,x
com 1,y
cpd #1 ; 16 bits
cpd #1000
cpd 1
cpd 1000
cpd 1,x
cpd 1,y
cpx #1 ; 16 bits
cpx #1000
cpx 1
cpx 1000
cpx 1,x
cpx 1,y
cpy #1 ; 16 bits
cpy #1000
cpy 1
cpy 1000
cpy 1,x
cpy 1,y
daa
deca
decb
dec 1 ; extended
dec 1000
dec 1,x
dec 1,y
des
dex
dey
eora #1
eora 1
eora 1000
eora 1,x
eora 1,y
eorb #1
eorb 1
eorb 1000
eorb 1,x
eorb 1,y
fdiv
idiv
inca
incb
inc 1 ;extended
inc 1000
inc 1,x
inc 1,y
ins
inx
iny
jmp 1 ;extended
jmp 1000
jmp 1,x
jmp 1,y
jsr 1
jsr 1000
jsr 1,x
jsr 1,y
ldaa #1
ldaa 1
ldaa 1000
ldaa 1,x
ldaa 1,y
ldab #1
ldab 1
ldab 1000
ldab 1,x
ldab 1,y
ldd #1 ;16 bits
ldd #1000
ldd 1
ldd 1000
ldd 1,x
ldd 1,y
lds #1 ;16 bits
lds #1000
lds 1
lds 1000
lds 1,x
lds 1,y
ldx #1 ;16 bits
ldx #1000
ldx 1
ldx 1000
ldx 1,x
ldx 1,y
ldy #1 ;16 bits
ldy #1000
ldy 1
ldy 1000
ldy 1,x
ldy 1,y
lsla
lslb
lsl 1 ;extended
lsl 1000
lsl 1,x
lsl 1,y
lsld
lsra
lsrb
lsr 1 ;extended
lsr 1000
lsr 1,x
lsr 1,y
lsrd
mul
nega
negb
neg 1 ;extended
neg 1000
neg 1,x
neg 1,y
nop
oraa #1
oraa 1
oraa 1000
oraa 1,x
oraa 1,y
orab #1
orab 1
orab 1000
orab 1,x
orab 1,y
psha
pshb
pshx
pshy
pula
pulb
pulx
puly
rola
rolb
rol 1 ;extended
rol 1000
rol 1,x
rol 1,y
rora
rorb
ror 1 ;extended
ror 1000
ror 1,x
ror 1,y
rti
rts
sba
sbca #1
sbca 1
sbca 1000
sbca 1,x
sbca 1,y
sbcb #1
sbcb 1
sbcb 1000
sbcb 1,x
sbcb 1,y
sec
sei
sev
staa 1
staa 1000
staa 1,x
staa 1,y
stab 1
stab 1000
stab 1,x
stab 1,y
std 1
std 1000
std 1,x
std 1,y
stop
sts 1
sts 1000
sts 1,x
sts 1,y
stx 1
stx 1000
stx 1,x
stx 1,y
sty 1
sty 1000
sty 1,x
sty 1,y
suba #1
suba 1
suba 1000
suba 1,x
suba 1,y
subb #1
subb 1
subb 1000
subb 1,x
subb 1,y
subd #1 ;extended
subd #1000
subd 1
subd 1000
subd 1,x
subd 1,y
swi
tab
tap
tba
test
tpa
tsta
tstb
tst 1 ;extended
tst 1000
tst 1,x
tst 1,y
tsx
tsy
txs
tys
wai
xgdx
xgdy
\Rogue\Monster\
else
echo "will not over write test/suite68HC11.asm"
fi
if [ `wc -c test/suite68HC11.asm | awk '{printf $1}'` -ne 3203 ]
then
echo `wc -c test/suite68HC11.asm | awk '{print "Got " $1 ", Expected " 3203}'`
fi
if `test ! -s test/suite68705.asm`
then
echo "writing test/suite68705.asm"
cat > test/suite68705.asm << '\Rogue\Monster\'
processor 68705
org 0
adc #10
adc 10
adc 1000
adc ,x
adc 1,x
adc 1000,x
add #10
add 10
add 1000
add ,x
add 1,x
add 1000,x
and #10
and 10
and 1000
and ,x
and 1,x
and 1000,x
asla
aslx
asl 10
asl ,x
asl 10,x
asra
asrx
asr 10
asr ,x
asr 10,x
bcc .
bclr 1,23
bcs .
beq .
bhcc .
bhcs .
bhi .
bhs .
bih .
bil .
bit #10
bit 10
bit 1000
bit ,x
bit 1,x
bit 1000,x
blo .
bls .
bmc .
bmi .
bms .
bne .
bpl .
bra .
brn .
brclr 1,10,.
brset 1,10,.
bset 1,10
bsr .
clc
cli
clra
clrx
clr 10
clr ,x
clr 10,x
cmp #10
cmp 10
cmp 1000
cmp ,x
cmp 1,x
cmp 1000,x
coma
comx
com 10
com ,x
com 10,x
cpx #10
cpx 10
cpx 1000
cpx ,x
cpx 10,x
cpx 1000,x
deca
decx
dec 10
dec ,x
dec 10,x
eor #10
eor 10
eor 1000
eor ,x
eor 10,x
eor 1000,x
inca
incx
inc 10
inc ,x
inc 10,x
jmp 10
jmp 1000
jmp ,x
jmp 10,x
jmp 1000,x
jsr 10
jsr 1000
jsr ,x
jsr 10,x
jsr 1000,x
lda #10
lda 10
lda 1000
lda ,x
lda 10,x
lda 1000,x
ldx #10
ldx 10
ldx 1000
ldx ,x
ldx 10,x
ldx 1000,x
lsla
lslx
lsl 10
lsl ,x
lsl 10,x
lsra
lsrx
lsr 10
lsr ,x
lsr 10,x
nega
negx
neg 10
neg ,x
neg 10,x
nop
ora #10
ora 10
ora 1000
ora ,x
ora 10,x
ora 1000,x
rola
rolx
rol 10
rol ,x
rol 10,x
rora
rorx
ror 10
ror ,x
ror 10,x
rsp
rti
rts
sbc #10
sbc 10
sbc 1000
sbc ,x
sbc 10,x
sbc 1000,x
sec
sei
sta 10
sta 1000
sta ,x
sta 10,x
sta 1000,x
stx 10
stx 1000
stx ,x
stx 10,x
stx 1000,x
sub #10
sub 10
sub 1000
sub ,x
sub 10,x
sub 1000,x
swi
tax
tsta
tstx
tst 10
tst ,x
tst 10,x
txa
\Rogue\Monster\
else
echo "will not over write test/suite68705.asm"
fi
if [ `wc -c test/suite68705.asm | awk '{printf $1}'` -ne 1628 ]
then
echo `wc -c test/suite68705.asm | awk '{print "Got " $1 ", Expected " 1628}'`
fi
if `test ! -s test/suite6303.asm`
then
echo "writing test/suite6303.asm"
cat > test/suite6303.asm << '\Rogue\Monster\'
processor hd6303
org 0
adda #10 ; 8B 0A
adda 10 ; 9B 0A
adda 10,x ; AB 0A
adda 1000 ; BB 03 E8
addb #10 ; CB 0A
addb 10 ; DB 0A
addb 10,x ; EB 0A
addb 1000 ; FB 03 E8
addd #1000 ; C3 03 E8
addd 10 ; D3 0A
addd 10,x ; E3 0A
addd 1000 ; F3 03 E8
aba ; 1B
adca #10 ; 89 0A
adca 10 ; 99 0A
adca 10,x ; A9 0A
adca 1000 ; B9 03 E8
adcb #10 ; C9
adcb 10 ; D9
adcb 10,x ; E9
adcb 1000 ; F9 03 E8
anda #10 ; 84 0A
anda 10 ; 94 0A
anda 10,x ; A4 0A
anda 1000 ; B4 03 E8
andb #10 ; C4 0A
andb 10 ; D4 0A
andb 10,x ; E4 0A
andb 1000 ; F4 03 E8
bita #10 ; 85 0A
bita 10 ; 95 0A
bita 10,x ; A5 0A
bita 1000 ; B5 03 E8
bitb #10 ; C5 0A
bitb 10 ; D5 0A
bitb 10,x ; E5 0A
bitb 1000 ; F5 03 E8
clr 10,x ; 6F 0A
clr 1000 ; 7F 03 E8
clra ; 4F
clrb ; 5F
cmpa #10 ; 81 0A
cmpa 10 ; 91 0A
cmpa 10,x ; A1 0A
cmpa 1000 ; B1 03 E8
cmpb #10 ; C1 0A
cmpb 10 ; D1 0A
cmpb 10,x ; E1 0A
cmpb 1000 ; F1 03 E8
cba ; 11
com 10,x ; 63 0A
com 1000 ; 73 03 E8
coma ; 43
comb ; 53
neg 10,x ; 60 0A
neg 1000 ; 70 03 E8
nega ; 40
negb ; 50
daa ; 19
dec 10,x ; 6A 0A
dec 1000 ; 7A 03 E8
deca ; 4A
decb ; 5A
eora #10 ; 88 0A
eora 10 ; 98 0A
eora 10,x ; A8 0A
eora 1000 ; B8 03 E8
eorb #10 ; C8 0A
eorb 10 ; D8 0A
eorb 10,x ; E8 0A
eorb 1000 ; F8 03 E8
inc 10,x ; 6C 0A
inc 1000 ; 7C 03 E8
inca ; 4C
incb ; 5C
ldaa #10 ; 86 0A
ldaa 10 ; 96 0A
ldaa 10,x ; A6 0A
ldaa 1000 ; B6 03 E8
ldab #10 ; C6 0A
ldab 10 ; D6 0A
ldab 10,x ; E6 0A
ldab 1000 ; F6 03 E8
ldd #1000 ; CC 03 E8
ldd 10 ; DC 0A
ldd 10,x ; EC 0A
ldd 1000 ; FC 03 E8
mul ; 3D
oraa #10 ; 8A 0A
oraa 10 ; 9A 0A
oraa 10,x ; AA 0A
oraa 1000 ; BA 03 E8
orab #10 ; CA 0A
orab 10 ; DA 0A
orab 10,x ; EA 0A
orab 1000 ; FA 03 E8
psha ; 36
pshb ; 37
pula ; 32
pulb ; 33
rol 10,x ; 69 0A
rol 1000 ; 79 03 E8
rola ; 49
rolb ; 59
ror 10,x ; 66 0A
ror 1000 ; 76 03 E8
rora ; 46
rorb ; 56
asl 10,x ; 68 0A
asl 1000 ; 78 03 E8
asla ; 48
aslb ; 58
asld ; 05
asr 10,x ; 67 0A
asr 1000 ; 77 03 E8
asra ; 47
asrb ; 57
lsr 10,x ; 64 0A
lsr 1000 ; 74 03 E8
lsra ; 44
lsrb ; 54
lsrd ; 04
staa 10 ; 97 0A
staa 10,x ; A7 0A
staa 1000 ; B7 03 E8
stab 10 ; D7 0A
stab 10,x ; E7 0A
stab 1000 ; F7 03 E8
std 10 ; DD 0A
std 10,x ; ED 0A
std 1000 ; FD 03 E8
suba #10 ; 80 0A
suba 10 ; 90 0A
suba 10,x ; A0 0A
suba 1000 ; B0 03 E8
subb #10 ; C0 0A
subb 10 ; D0 0A
subb 10,x ; E0 0A
subb 1000 ; F0 03 E8
subd #1000 ; 83 03 E8
subd 10 ; 93 0A
subd 10,x ; A3 0A
subd 1000 ; B3 03 E8
sba ; 10
sbca #10 ; 82 0A
sbca 10 ; 92 0A
sbca 10,x ; A2 0A
sbca 1000 ; B2 03 E8
sbcb #10 ; C2 0A
sbcb 10 ; D2 0A
sbcb 10,x ; E2 0A
sbcb 1000 ; F2 03 E8
tab ; 16
tba ; 17
tst 10,x ; 6D 0A
tst 1000 ; 7D 03 E8
tsta ; 4D
tstb ; 5D
aim 10 ; 71 0A
aim 10,x ; 61 0A
oim 10 ; 72 0A
oim 10,x ; 62 0A
eim 10 ; 75 0A
eim 10,x ; 65 0A
tim 10 ; 7B 0A
tim 10,x ; 6B 0A
cpx #1000 ; 8C 03 E8
cpx 10 ; 9C 0A
cpx 10,x ; AC 0A
cpx 1000 ; BC 03 E8
dex ; 09
des ; 34
inx ; 08
ins ; 31
ldx #1000 ; CE 03 E8
ldx 10 ; DE 0A
ldx 10,x ; EE 0A
ldx 1000 ; FE 03 E8
lds #1000 ; 8E 03 E8
lds 10 ; 9E 0A
lds 10,x ; AE 0A
lds 1000 ; BE 03 E8
stx 10 ; DF 0A
stx 10,x ; EF 0A
stx 1000 ; FF 03 E8
sts 10 ; 9F 0A
sts 10,x ; AF 0A
sts 1000 ; BF 03 E8
txs ; 35
tsx ; 30
abx ; 3A
pshx ; 3C
pulx ; 38
xgdx ; 18
bra . ; 20 FE
brn . ; 21 FE
bcc . ; 24 FE
bcs . ; 25 FE
beq . ; 27 FE
bge . ; 2C FE
bgt . ; 2E FE
bhi . ; 22 FE
ble . ; 2F FE
bls . ; 23 FE
blt . ; 2D FE
bmi . ; 2B FE
bne . ; 26 FE
bvc . ; 28 FE
bvs . ; 29 FE
bpl . ; 2A FE
bsr . ; 8D FE
jmp 10,x ; 6E 0A
jmp 1000 ; 7E 03 E8
jsr 10 ; 9D 0A
jsr 10,x ; AD 0A
jsr 1000 ; BD 03 E8
nop ; 01
rti ; 3B
rts ; 39
swi ; 3F
wai ; 3E
slp ; 1A
clc ; 0C
cli ; 0E
clv ; 0A
sec ; 0D
sei ; 0F
sev ; 0B
tap ; 06
tpa ; 07
\Rogue\Monster\
else
echo "will not over write test/suite6303.asm"
fi
if [ `wc -c test/suite6303.asm | awk '{printf $1}'` -ne 4346 ]
then
echo `wc -c test/suite6303.asm | awk '{print "Got " $1 ", Expected " 4346}'`
fi
if `test ! -s test/example.asm`
then
echo "writing test/example.asm"
cat > test/example.asm << '\Rogue\Monster\'
; EXAMPLE.ASM (6502 Microprocessor)
;
processor 6502
mac ldax
lda [{1}]
ldx [{1}]+1
endm
mac ldaxi
lda #<[{1}]
ldx #>[{1}]
endm
mac stax
sta [{1}]
stx [{1}]+1
endm
mac pushxy
txa
pha
tya
pha
endm
mac popxy
pla
tay
pla
tax
endm
mac inc16
inc {1}
bne .1
inc {1}+1
.1
endm
STOP1 equ %00000000 ;CxCTL 1 Stop bit
STOP2 equ %10000000 ;CxCTL 2 Stop bits (WL5:1.5, WL8&par:1)
WL5 equ %01100000 ;CxCTL Wordlength
WL6 equ %01000000
WL7 equ %00100000
WL8 equ %00000000
RCS equ %00010000 ;CxCTL 1=Select baud, 0=ext. receiver clk
B76800 equ %0000 ;CxCTL Baud rates (1.2288 Mhz clock)
B75 equ %0001
B100 equ %0010
B150 equ %0011
B200 equ %0100
B300 equ %0101
B400 equ %0110
B600 equ %0111
B800 equ %1000
B1200 equ %1001
B1600 equ %1010
B2400 equ %1011
B3200 equ %1100
B4800 equ %1101
B6400 equ %1110
B12800 equ %1111
PARODD equ %00100000 ;CxCMD Select Parity
PAREVEN equ %01100000
PARMARK equ %10100000
PARSPACE equ %11100000
PAROFF equ %00000000
RECECHO equ %00010000 ;CxCMD Receiver Echo mode
TMASK equ %00001100
TDISABLE equ %00000000 ;CxCMD Transmitter modes
TDISABLER equ %00001000 ;RTS stays asserted
TENABLE equ %00000100
TBREAK equ %00001100 ;send break
UA_IRQDSBL equ %00000010
DTRRDY equ %00000001 ;~DTR output is inverted (low)
SR_PE equ %00000001 ;CxSTAT Status
SR_FE equ %00000010 ;NOTE: writing dummy data causes RESET
SR_OVRUN equ %00000100
SR_RDRFULL equ %00001000
SR_TDREMPTY equ %00010000
SR_DCD equ %00100000
SR_DSR equ %01000000
SR_INTPEND equ %10000000
T1_OEPB7 equ %10000000 ;x_ACR
T1_FREERUN equ %01000000 ;T1 free running mode
T1_ONESHOT equ %00000000
T2_ICPB6 equ %00100000 ;T2 counts pulses on PB6
T2_ONESHOT equ %00000000 ;T2 counts phase2 transitions
SRC_OFF equ %00000000 ;shift register control
SRC_INT2 equ %00000100
SRC_INPH2 equ %00001000
SRC_INEXT equ %00001100
SRC_OUTFR equ %00010000 ;free running output using T2
SRC_OUTT2 equ %00010100
SRC_OUTPH2 equ %00011000
SRC_OUTEXT equ %00011100
PBLE equ %00000010 ;on CB1 transition (in/out).
PALE equ %00000001 ;on CA1 transition (in). data retained
;x_PCR
CB2_I_NEG equ %00000000 ;interrupt on neg trans, r/w ORB clears
CB2_I_NEGI equ %00100000 ; same, but r/w ORB does not clear int
CB2_I_POS equ %01000000 ;interrupt on pos trans, r/w ORB clears
CB2_I_POSI equ %01100000 ; same, but r/w ORB does not clear int
CB2_O_HSHAK equ %10000000 ;CB2=0 on r/w ORB, CB2=1 on CB1 transition
CB2_O_PULSE equ %10100000 ;CB2=0 for one clock after r/w ORB
CB2_O_MANLO equ %11000000 ;CB2=0
CB2_O_MANHI equ %11100000 ;CB2=1
CA2_I_NEG equ %00000000 ;interrupt on neg trans, r/w ORA clears
CA2_I_NEGI equ %00100000 ; same, but r/w ORA does not clear int
CA2_I_POS equ %01000000 ;interrupt on pos trans, r/w ORA clears
CA2_I_POSI equ %01100000 ; same, but r/w ORA does not clear int
CA2_O_HSHAK equ %10000000 ;CA2=0 on r/w ORA, CA2=1 on CA1 transition
CA2_O_PULSE equ %10100000 ;CA2=0 for one clock after r/w ORA
CA2_O_MANLO equ %11000000 ;CA2=0
CA2_O_MANHI equ %11100000 ;CA2=1
CB1_THI equ %00010000
CB1_TLO equ %00000000
CA1_THI equ %00000001
CA1_TLO equ %00000000
VIRPEND equ %10000000 ;x_IFR
IRENABLE equ %10000000 ;x_IER 1's enable ints 0=no change
IRDISABLE equ %00000000 ;x_IER 1's disable ints 0=no change
IRT1 equ %01000000
IRT2 equ %00100000
IRCB1 equ %00010000
IRCB2 equ %00001000
IRSR equ %00000100
IRCA1 equ %00000010
IRCA2 equ %00000001
seg.u bss
org $0000 ;RAM (see below)
org $2000 ;unused
org $4000 ;unused
org $6000 ;6551 CHANNEL #1
C1DATA ds 1
C1STAT ds 1
C1CMD ds 1
C1CTL ds 1
org $8000 ;6551 CHANNEL #2
C2DATA ds 1
C2STAT ds 1
C2CMD ds 1
C2CTL ds 1
org $A000 ;6522 (HOST COMM)
H_ORB ds 1
H_ORAHS ds 1 ;with CA2 handshake
H_DDRB ds 1
H_DDRA ds 1
H_T1CL ds 1 ;read clears interrupt flag
H_T1CH ds 1 ;write clears interrupt flag
H_T1CLL ds 1
H_T1CHL ds 1 ;write clears interrupt flag
H_T2CL ds 1 ;read clears interrupt flag
H_T2CH ds 1 ;write clears interrupt flag
H_SR ds 1
H_ACR ds 1
H_PCR ds 1
H_IFR ds 1
H_IER ds 1
H_ORA ds 1 ds 1
I_T2CL ds 1
I_T2CH ds 1
I_SR ds 1
I_ACR ds 1
I_PCR ds 1
I_IFR ds 1
I_IER ds 1
I_ORA ds 1
; ---------------------- ds 1
I_T1CLL ds 1
I_T1CHL ds 1
I_T2CL ds 1
I_T2CH ds 1
I_SR ds 1
I_ACR ds 1
I_PCR ds 1
I_IFR ds 1
I_IER ds 1
I_ORA ds 1
; -------------------------- ZERO PAGE -------------------
seg.u data
org $00
; -------------------------- NORMAL RAM -------------------
org $0100
RAMEND equ $2000
; -------------------------- CODE -------------------
seg code
org $F000
PROMBEG equ .
RESET subroutine
sei ;disable interrupts
ldx #$FF ;reset stack
txs
lda #$FF
sta H_DDRA
sta C1STAT ;reset 6551#1 (garbage data)
sta C2STAT ;reset 6551#2
lda #$7F ;disable all 6522 interrupts
sta H_IER
sta I_IER
lda #%00010000 ;76.8 baud, 8 bits, 1 stop
sta C1CTL
lda #%00000101 ;no parity, enable transmitter & int
sta C1CMD
lda #$AA ;begin transmision
sta C1DATA
lda #%00011111 ;9600 baud, 8 bits, 1 stop
sta C2CTL
lda #%00000101
sta C2CMD
lda #$41
sta C2DATA
cli ;enable interrupts
.1 jsr LOAD
jsr SAVE
jmp .1
LOAD subroutine
ldx #0
.1 txa
sta $0500,x
inx
bne .1
rts
SAVE subroutine
ldx #0
.2 lda $0500,x
sta H_ORA
inx
bne .2
rts
NMI rti
subroutine
IRQ bit C1STAT
bpl .1
pha
lda #$AA
sta C1DATA
lda C1DATA
pla
rti
.1 bit C2STAT
bpl .2
pha
lda #$41
sta C2DATA
lda C2DATA
pla
.2 rti
; VECTOR ------------------------------------------------
seg vector
org $FFFA
dc.w NMI
dc.w RESET
dc.w IRQ
PROMEND equ .
\Rogue\Monster\
else
echo "will not over write test/example.asm"
fi
if [ `wc -c test/example.asm | awk '{printf $1}'` -ne 7052 ]
then
echo `wc -c test/example.asm | awk '{print "Got " $1 ", Expected " 7052}'`
fi
echo "Finished archive 1 of 3"
# if you want to concatenate archives, remove anything after this line
exit
--
Bob Page, U of Lowell CS Dept. page@swan.ulowell.edu ulowell!page
Have five nice days.