[net.jobs] Resume, hardware engineer

michael@saber.UUCP (Michael Marria) (08/22/85)

          This is directed to the Bay Area in northern California,
	  the states of New Mexico, Colorado, Arizona and Utah and
	  Australia as desirable locations for my family.

	  As this is my last access to the net for a while,
	please respond by the following:




		        MICHAEL ROBERT MARRIA
			P.O.Box 370328
			Montara, California 94037
			(415) 728-7817 (message)



Employment Objective:

		Career oriented position as an
		engineer of digital systems,
		research and developement engineer
		test engineer or test developement



Software knowledge:

		Assembly level programming including 6800, Z80, 8080, 6502 and
		1805 processors. Medium UNIX and C language experience.



Hardware knowledge:

		    Including 6800, 68000, Z80, 6502, National 32 bit chip set,
		RCA 1805 chip set, AMD 2900 bit slice, Ethernet, SDLC, HDLC,
		DMA structures, multiple bus structures, D/A and A/D conversion
		TTL, ECL, CMOS, dynamic and static memories, PALs and E/PROMs.
		    Experienced with hard/soft disk drives, printers, modems,
		terminals, tape drives and their interfacing.
		    Also some RF, video monitors, high gain amplifiers, linear
		and switching power supplies.
	



Employment History:


		Associate Test Engineer		December 1984 - September 1985

		Saber Technology Inc.
		2381 Bering Drive
		San Jose, California
		
		    Responsibilities included developement of strategies
		for an effective manufacture test flow, employment and 
		training of technicians to test procedures and aquisition 
		of necessary test material.
		    Responsible for design of a stand-alone system test module 
		for the UNIX based gaphics workstation. System designed around
		the National 32032 family, multiple bus structure, utilizing 
		DMA to the memories, peripherals and graphic accelorators.
		    Test module resides in  the workstation, burn-in racks or 
		stand alone test fixture.
		    This microprocessor and state machine is highly adapatable
		through firmware programming to workstation design alterations.






		Senior Engineering Technician	     February 1982 - June 1983
		
		Sierra Technology Inc. (contract agency)
		4444 Manzanita
		Sacramento, California

		Exploration Logging:   (first contract)
		
		    Developed new product in colaboration with Engineer Geoff
		Stephenson. Eighty-five percent responsible for hardware
		design, twenty percent responsible for software. Product
		known as `Torque-Turn Control' for use in explosive gas
		enviroment (oil drill sites). 
		    Hardware consisted of dual (RCA 1805) processor, DMA system
		to medium resolution display memory, printer and keyboard ports
		and designed with high speed CMOS for low current requirements.
                    This unit, intelligent field controller and graphic 
		printer each enclosed in neutral gas pressurized boxes included
		low current, intrinsically safe power-up interlocks.
			
		University of California Davis: (second contract)

		    Entered uncompleted project as member of two-man team.
		Finished installation of main enviromental control (PDP 11/34 )
		computer, and it's eighty micro-based field control
		systems. 
		    System handles heating and cooling throughout approximately
		thirty buildings on campus. Required correction of existing 
		documentation and testing of hardware/software control over 
		some twenty-five hundred points of monitor and control.

		Stanford Linear Accelorator Center	March 1979 - August 1981

		    Fabricated and tested experimental Nuclear Instrumentation
		Modules, CAMAC system boards and related test equipment.
		Implemented required designs and changes, maintained and
		upgraded documents of PEP and SPEAR and performed maintenance
		on computers, RF systems, control panels and communications.


Professional education:
 
		National Radio Institute
		Washington D.C.
		Master radio and television repair course (correspondance)
						1978 - 1980
		Foothill College 
		Los Altos, California
		Digital design,
		Mathematics in electronics	Spring 1980
 
		American River College
		Sacramento, California
		Transistor amplifier design 	Fall 1980

		Stanford Linear Accelorator Center	
		AMD 2900 Bit-slice, state machine design
		and DMA structures learned on the job 
		through engineers guidance.   1979-1981
					 (six month leave in 1980)

 		References: Furnished upon request.
  

 		Thank you for your time,
		Michael R. Marria