mwang (02/01/83)
DEPARTMENT OF COMPUTER SCIENCE
UNIVERSITY OF WATERLOO
SEMINAR ACTIVITIES
NUMERICAL ANLYSIS SEMINAR - Friday, February 11, 1983.
Prof. N. Ostlund of this department will speak on
"WATERLOOPS: New Resources for Experimentation in
Parallel Processing".
TIME: 3:30 PM
ROOM: M&C 5158
ABSTRACT
Two versions of a new multiple processor architec-
ture, the systolic loop (WATERLOOP), are under
current development at the University of Waterloo.
One of these is a 3 processor loop that uses the new
National Semiconductor 16032 chip. The other is a 64
processor loop that uses the Intel 8086 and 8087 co-
processors.
These efforts will provide experimental facilities
for exploring research questions in all three major
areas of parallel computation - algorithm develop-
ment, software development, and hardware development.
The purpose of the talk will be to describe the
present status of the project. An effort will be
made to entice other members of the community into
orienting aspects of then research towards systolic
processing, since practical testbeds for exploring
systolic algorithms will soon be available. The 64
processor version will be a significant computational
resource, since it presents up to 8-10 times the pro-
cessing power of a VAX-11/780 even for numerical ap-
plications requiring 64-bit floating point arithmet-
ic.
February 1, 1983