[ont.events] UW Systems Seminar, Mr. Vijayan on "Building a VLSI Layout Language: Design and Theoretical Issues"

mwang (02/22/83)

         _D_E_P_A_R_T_M_E_N_T _O_F _C_O_M_P_U_T_E_R _S_C_I_E_N_C_E
         _U_N_I_V_E_R_S_I_T_Y _O_F _W_A_T_E_R_L_O_O
         _S_E_M_I_N_A_R _A_C_T_I_V_I_T_I_E_S

         _S_Y_S_T_E_M_S _S_E_M_I_N_A_R
                       - Monday, February 28, 1983.

         Mr. G. Vijayan of Princeton University  will  speak  on
         ``_B_u_i_l_d_i_n_g _a _V_L_S_I _L_a_y_o_u_t _L_a_n_g_u_a_g_e: _D_e_s_i_g_n _a_n_d _T_h_e_o_r_e_t_i_-
         _c_a_l _I_s_s_u_e_s''.

         _T_I_M_E:    3.30 PM

         _R_O_O_M:    MC 5158

         _A_B_S_T_R_A_C_T

         Automation of circuit layout is an important  component
         of  any VLSI design environment.  One of the approaches
         to automation is a procedural language  for  describing
         layouts.   Making  layout  design  similar  to software
         design has many advantages.

         ALI  is  one  such  layout  language  currently   under
         development   at  Princeton.   Execution  of  a  ``con-
         sistent'' ALI program will result in a layout,  but  as
         an  intermediate  step, a set of linear constraints has
         to be solved.  The layout produced is guaranteed to  be
         free  of  design rules violations provided the ALI pro-
         gram is ``complete''.

         Some features of the language  and  its  implementation
         will  be  described.  We will also describe some of the
         theoretical issues that arose  during  its  implementa-
         tion.   These  concern  algorithms  for solving sets of
         linear constraints, and for recognizing  and  embedding
         certain  kinds  of  graphs  called  planar  rectilinear
         graphs.

                     February 22, 1983