twk@cadence.com (Tom Kronmiller) (02/09/90)
After years of working on hardware design tools, I have become involved with theoretical and practical aspects of implementing highly optimizing compilers. In hardware CAD, it is frequently the case that the tools run for many CPU hours, and this makes the customers unhappy. They would like to have the software run in much less time. One of the things this suggests is that the software should be made to run on parallel hardware. In evaluating the cost/benefit ratio of parallelization, the question of whether compilers can do the optimization for us arose, along with the question of how well a compiler could do the job. This rekindled my personal interest in the field of compilation, so I have been trying to learn about the state of the art in parallelizing/pipelining compilers. My request has two parts: 1. If anyone knows of good references to papers discussing theory and practice, please advise me. Especially the practical aspects, such as good data structures for representing programs (large programs, by the way), successful heuristics for transforming the code and empirically tested rules for ordering their application, expected amounts of memory and MIPS required, expected degree of pipelining or parallelizing to be attained, etc. I would take on-line copies of papers, too. 2. I'd also like to know who are the true experts in this area; i.e., people with strong theoretical backgrounds, or especially people who have successfully implemented highly optimizing compilers for some of the newer pipelined RISC machines, or (say) the i860 or a hyper-cube. I am interested in learning about their experiences with the various newer architectures. I'm also interested in their opinions about manual vs. automated pipelining/parallelizing. Any information will be gratefully appreciated. Please reply via e-mail. Thanks! Thomas W. Kronmiller twk@cadence.com Manager, System Architecture Software Development Environment Ph. 408-987-5479 Cadence Design Systems, Inc. FAX 408-727-5049 -- Send compilers articles to compilers@esegue.segue.boston.ma.us {spdcc | ima | lotus}!esegue. Meta-mail to compilers-request@esegue. Please send responses to the author of the message, not the poster.
scott@cs.rochester.edu (Michael Scott) (02/10/90)
The following is a bibliography I threw together for a graduate seminar in back-end compiler technology. I make ABSOLUTELY NO CLAIMS about coverage, balance, accuracy, or whatever (as I said, it was thrown together), but this may nonetheless be of some use to the poster, or to others. Thanks to Cesar Quiroz for providing many of the citations. General Compiler Books [ ] A. V. Aho, R. Sethi, and J. D. Ullman, Compilers: Principles, Techniques, and Tools, Addison-Wesley, Reading, MA, 1986. [ ] A. V. Aho and J. D. Ullman, The Theory of Parsing, Translation, and Compiling, Vol 2: Compiling, Prentice-Hall, 1973. [ ] J. Cocke and J. T. Schwartz, Programming Languages and Their Compilers, Courant Institute of Mathematical Sciences, 1970. [ ] C. N. Fischer and R. J. LeBlanc, Crafting a Compiler, Benjamin/Cummings, Menlo Park, CA, 1988. [ ] David Gries, Compiler Construction for Digital Computers, John Wiley, 1971. [ ] Jean-Paul Tremblay and Paul G. Sorenson, The Theory and Prac- tice of Compiler Writing, McGraw-Hill Inc., 1984. [ ] W. A. Wulf, R. K. Johnson, C. B. Weinstock, S. O. Hobbs, and C. M. Geschke, The Design of an Optimizing Compiler, Elsevier North-Holland, NY, 1975. Simple Optimizations [ ] D. R. Hanson, "Simple Code Optimizations," Software - Practice and Experience 13 (1983), pp. 745-763. [ ] Michael L. Powell, "A Portable Optimizing Compiler for Modula- 2," Proceedings of the SIGPLAN'84 Symposium on Compiler Con- struction, ACM, 1984, pp. 310-318. Miscellaneous [ ] F. E. Allen, "Program Optimization," Annual Review of Automatic Programming 5 (1969), pp. 239-307. [ ] Utpal Banerjee, "Speedup of Ordinary Programs," UIUCDS-R-79- 989, U of Illinois at Urbana-Champaign, Oct 1979. [ ] David Bernstein, Haran Boral, and Ron Y. Pinter, "Optimal Chaining in Expression Trees," IEEE Transactions on Computers 37:11 (November 1988), pp. 1366-1374. [ ] V. A. Busam and D. E. Englund, "Optimization of expresions in Fortran," CACM 12:12 (1969), pp. 666-674. [ ] J. Cocke, "Global common subexpression elimination," SIGPLAN notices 5:7, ACM (1970), pp. 20-24. [ ] J. Cocke and K. Kennedy, "An Algorithm for Reduction of Opera- tor Strength," CACM 20:11 (), pp. 850-856. [ ] D. S. Coutant, C. L. Hammond, and J. W. Kelley, "Compilers for the New Generation of Hewlett-Packard Computers," Hewlett- Packard Journal, 1986, pp. 4-18. [ ] Dhananjay Madhav Dhamdere and Jatinder Singh Keith, "Character- ization of Program Loops in Code Optimization," Computer Languages 8, Pergammon Press Ltd (1983), pp. 69-76. [ ] Samuel P. Harbison, "A Computer Architecture for the Dynamic Optimization of High-Level Language Programs," CMU-CS-80-143, Computer Science Dept., Carnegie-Mellon University, September 1980. [ ] D. E. Knuth, "An empirical study of FORTRAN programs," Software - Practice and Experience 1:12 (1971.), pp. 105-134. [ ] John M. Levesque and Joel W. Williamson, A Guidebook to Fortran on Supercomputers, Academic Press, NY, 1988. [ ] E. S. Lowry and C. W. Medlock, "Object Code Optimization," CACM 12:1 (January 1969), pp. 13-22. [ ] Ikuo Nakata, "On Compiling Algorithms for Arithmetic Expres- sions," CACM 10:8 (), pp. 492-494. [ ] L. Pollock and M. L. Soffa, "Incremental Compilation of Locally Optimized Code," pp. 152-164 in Conference Record of the Twelfth ACM Symposium on Principles of Programming Languages, Jan. 1985. [ ] Marc Sabatella, "Barking Up The Wrong Tree: Why Optimizing Com- pilers Are Still Unable To Match Assembly Language," Report UCB/CSD 88/428, Computer Science Division (EECS), University of California, Berkeley, Berkeley, California 94720, August 1988. [ ] J. D. Ullman, "Fast Algorithms for the Elination of Common Subexpressions," Acta Informatica 2:3 (1973), pp. 191-213. [ ] N. Wirth, "From Programming Language Design to Computer Con- struction," CACM 28:2 (February 1985), pp. 159-164. The 1984 Turing Award Lecture. Code Generation [ ] A. V. Aho, S. C. Johnson, and J. D. Ullman, "Code Generation for Machines with Multiregister Operations," pp. 21-28 in 4th ACN Symposium of Principles of Programming Languages. [ ] A. V. Aho, S. C. Johnson, and J. D. Ullman, "Code Generation for Expressions with Common Subexpressions," JACM 24:1 (), pp. 146-160. [ ] J. Bruno and R. Sethi, "Code Generation for a One-Register Machine," JACM 23:3 (), pp. 502-510. [ ] F. Chow, S. Correll, M. Himelstein, E. Killian, and L. Weber, "How Many Addressing Modes are Enough?," SIGPLAN Notices, Proceedings of ASPLOS II 22:10, Computer Society Press of the IEEE (October 5-8, 1987), pp. 117-121. Also sponsored by ACM's SIGARCH, SIGPLAN, and SIGOPS. [ ] C. W. Fraser and A. L. Wendt, "Integrating Code Generation and Optimization," Proceeding of the SIGPLAN '86 Symposium on Com- piler Construction, 25-27 June 1986, pp. 242-248. In ACM SIG- PLAN Notices 21:7 (July 1986). [ ] M. Ganapathi, C. N. Fischer, and J. L. Hennessy, "Retargetable Compiler Code Generation," ACM Computing Surveys 14:4 (December 1982), pp. 573-592. [ ] Ravi Sethi and J. D. Ullman, "The Generation of Optimal Code for Arithmetic Expressions," JACM 17:4 (), pp. 715-728. Low-Level and Peephole Optimizations [ ] W. J. Dally, "Micro-Optimization of Floating-Point Operations," Proceedings of the Third International Conference on Architec- tural Support for Programming Languages and Operating Systems (ASPLOS III), 3-6 April 1989, pp. 283-289. [ ] J. Davidson, "A retargetable instruction reoranizer," in SIG- PLAN Compiler Construction Conf., June 1986. [ ] Jack W. Davidson and David B. Whalley, "Quick Compilers Using Peephole Optimization," Software-Practice & Experience 19:1, WILEY (January 1989), pp. 79-97. [ ] C. Fraser and A. Wendt, "Integrating code generation and optim- ization," in SIGPLAN Compiler Construction Conf., June 1986. [ ] C. Fraser and A. Wendt, "Automatic generation of fast optimiz- ing code generators," in SIGPLAN Conf. on Prog. Lang. Design and Implementaion, June 1988. [ ] P. B. Gibbons and S. S. Muchnick, "Efficient Instruction Scheduling for a Pipelined Architecture," pp. 11-16 in ACM SIG- PLAN 86 Symposium on Compiler Construction, June 1986. [ ] J. Hennessy and T. Gross, "Postpass Code Optimization of Pipe- line Constraints," ACM Transactions on Programming Languages and Systems, July 1983, pp. 422-448. [ ] A. S. Tanenbaum, H. van Staveren, and J. W. Stevenson, "Using Peephole Optimization on Intermediate Code," ACM TOPLAS 3:1 (January 1982), pp. 21-36. Compiler Kits [ ] C. W. Fraser, "A Language for Writing Code Generators," Proceedings of the SIGPLAN '89 Conference on Programming Language Design and Implementation, 21-23 June 1989, pp. 238- 245. In ACM SIGPLAN Notices 24:7 (July 1989). [ ] H. Emmelmann, F.-W. Schroer, and R. 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[ ] Micha Sharir, "Structural Analysis: A New Approach To Flow Analysis in Optimizing Compilers," Computer Languages 5, Per- gammon Press Ltd (1980), pp. 141-153. [ ] Olin Shivers, "Control Flow Analysis in Scheme," SIGPLAN Notices: Proceedings of the SIGPLAN'88 Conference on Program- ming Language Design and Implementation 23:7, ACM (July 1988), pp. 164-174. [ ] R. E. Tarjan, "A Unified Approach to Path Problems," JACM 28:3 (July 1981), pp. 577-593. [ ] G. A. Venkatesh, "A Framework for Construction and Evaluation of High-Level Specifications for Program Analysis Techniques," Proceedings of the SIGPLAN '89 Conference on Programming Language Design and Implementation, 21-23 June 1989, pp. 1-12. In ACM SIGPLAN Notices 24:7 (July 1989). [ ] M. Wegman and K. Zadeck,, "Constant Propagation with Condi- tional Branches," pp. 291-299 in Conference Record of the Twelfth ACM Syposium on Principles of Programming Languages, Jan. 1985. [ ] K. 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Ganapathi, "Interprocedural Analysis - A Bibliography," ACM SIGPLAN Notices 22:6 (June 1987), pp. 12-17. [ ] S. Richardson and M. Ganapathi , "Code Optimization Across Procedures ," Computer 22:2 (February 1989), pp. 42-50 . [ ] Barbara G. Ryder, "A Survey of Interprocedural Data Flow Analysis Techniques," DCS-TR-85, Rutgers, Dec 1979. [ ] R. Scheifler, "An analysis of inline substitution for a struc- tured programming language," CACM 20:9 (Sept. 1977.). [ ] Micha Sharir and Amir Pnueli, "Two Approaches to Interpro- cedural Data Flow Analysis," pp. 189-233 in Program Flow Analysis, ed. Neil D. Jones, Prentice Hall, 1981. [ ] Remi Triolet, "Interprocedural Analysis for Program Restructur- ing with Parafrase," CSRD Rpt. No. 538, Univ. of Illinois at Urbana-Champaign, Center for Supercomputing Res. & Dev., Aug., 1986. Register Allocation [ ] J. C. Beatty, "Register Assignment Algorithm for Generation of Highly Optimized Object Code," IBM J. Res. Devel, , pp. 20-39. [ ] J. C. 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[ ] Monica Lam, "Software Pipelining: An Effective Scheduling Tech- nique for VLIW Machines," SIGPLAN Notices: Proceedings of the SIGPLAN'88 Conference on Programming Language Design and Imple- mentation 23, Volume II, Software:7, ACM (July 1988), pp. 318-328. [ ] Alexandru Nicolau, "Parallelism, Memory Anti-Aliasing And Correctness for Trace Scheduling Algorithms," YALE/DCS/RR-374, Yale, March 1985. [ ] Alexandru Nicolau, "Percolation Scheduling: A Parallel Compila- tion Technique," TR-85-678, Cornell University, May 1985. -- Michael L. Scott Computer Science Dept. (716) 275-7745, 5671 University of Rochester scott@cs.rochester.edu Rochester, NY 14627 ...!rochester!scott -- Send compilers articles to compilers@esegue.segue.boston.ma.us {spdcc | ima | lotus}!esegue. Meta-mail to compilers-request@esegue. Please send responses to the author of the message, not the poster.