pardo@cs.washington.edu (David Keppel) (03/21/91)
>>>[Can the `exchange' instruction reasonably be used for anything?] >pardo@cs.washington.edu writes: >>[Register allocator replaces load/store >> mov r0, -46[fp] >> mov -50[fp], r0 >> with merged slot assignment and exchange >> xchg r0, -44[fp] >> ] preston@ariel.rice.edu (Preston Briggs) writes: >[Please, no! The problem of merging spill locations is graph > coloring (discover lifetimes and note when disjoint), then you > require the register colors to match and the stack locations to match.] I think merged slot assignments is much easier. You do register assignment and as a part of that you *decide* which spill locations are assigned where, and you *already know* which virtual registers were and weren't disjoint -- indeed, that's why you're creating the stack slots in the first place. >[Also, you can't separately schedule the load and the store.] Quite true. >[Frankly, I think that `exchange' is too CISCy.] Agreed. I imagine that making exchange restartable is a royal pain except for register<->register swaps. ;-D on ( Register search and rescue ) Pardo -- Send compilers articles to compilers@iecc.cambridge.ma.us or {ima | spdcc | world}!iecc!compilers. Meta-mail to compilers-request.
chip@soi.com (Chip Morris) (03/25/91)
David Keppel and Preston Briggs say that `exchange' is to CISCy.
I disagree. Our compiler can make use of exchange instructions during
register alignment. Very handy -- no temporary storage needed. And
we prefer RISCs. Of course, if adding EXCH costs chip real estate or cycle
time, then forget it.
The theoretical basis for using exchanges is in M. Karr's article
"Code Generation by Coagulation" in the 1984 SIGPLAN conference.
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Chip Morris, Senior Engineer
Software Options, Inc., 22 Hilliard St., Cambridge MA 02138 (617) 497-5054
chip@soi.com
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