benoni@ssc-vax.UUCP (Charles L Ditzel) (03/18/88)
I am interested in knowing if the Apollo DN1000 exists outside of the labs...(or even in the lab) ... is it going through beta testing...alpha testing... My interest is spurred by some observations and rumors...people around me have wondered about the actual benchmark released ... apollo is claiming ranges for benchmarks (15-30 MIPS for one CPU) ...some people are saying that these are extrapolations and that they saw something to that effect in a trade rag ... since these people are not techies ... would someone at Apollo care to comment? This set me to wondering : 1) Why is Apollo announcing a machine that will not ship until the third or fourth quarter (and initially without graphics) so soon? Understandably the super Graphics computer is filling up fast...(alliant i think just bought raster technologies, Ardent has also announced, etc.) 2) Why do they cite ranges in their benchmarks? I noticed that they did have a drystone ...Is there any substance that some of the benchmarks were extrapolations? 3) Are the machines in beta? Have they left the lab? Have they been pieced together? -------------------- On another subject : 1) Will SR10 require a choice of which OS to use? Calls to Aegis from Unix will break? 2) If so, will you still be able to bring up multiple shells (Aegis, BSD4.3, Sys5)? ------------- My Opinions are my own.
cmcmanis@SUN.COM (Chuck McManis) (04/02/88)
In article <1772@ssc-vax.UUCP> benoni@ssc-vax.UUCP (Charles L Ditzel) writes: >I am interested in knowing if the Apollo DN1000 exists outside >of the labs...(or even in the lab) ... is it going through >beta testing...alpha testing... I too would be really interested in getting a definitive answer on this question. After reading through the PRISM blurbs it looks like there is some neat technology possibilities, unfortunately NO ONE I have talked to knows anything about this machine (there are Apollo people). The Wall Street Journal and other less reliable reports seem to indicate that the 10000 was nothing more than a neat idea in someone's head. I can't believe that this entire announcement was based entirely on simulations and speculations of probable performance, assuming someone could build the thing. Some questions that I would like to have answered (if answers exist I guess). The 4 way interleaved cache for the four processors, is it a virtual address cache or straight physical address cache ? The glossies seem to indicate a dual floating/integer architecture on the processors (each word being half floating point and half integer). Does this mean that if you are doing only integer things that you waste half of the processor? Or can it become a dual integer processor ? Are there any relevent papers I could look up on the architecture? Will there be some at the summer Usenix? How about at the ACM OS conference? What kind of cycle times does main memory see, and how does DMA affect performance? Is the new UNIX like OS multithreaded? Can you split processes on the processors? How does your software compare to the Ardent Titan's vectorizing compilers? Can you run MACH on it? When is the absolute earliest date someone could buy one of these machines? -- --Chuck McManis uucp: {anywhere}!sun!cmcmanis BIX: cmcmanis ARPAnet: cmcmanis@sun.com These opinions are my own and no one elses, but you knew that didn't you.
benoni@ssc-vax.UUCP (Charles L Ditzel) (04/05/88)
In article <8804012353.AA03028@pepper.sun.com>, cmcmanis@SUN.COM (Chuck McManis) writes: > In article <1772@ssc-vax.UUCP> benoni@ssc-vax.UUCP (Charles L Ditzel) writes: > >I am interested in knowing if the Apollo DN1000 exists outside > >of the labs...(or even in the lab) ... is it going through > >beta testing...alpha testing... > > I too would be really interested in getting a definitive answer on this > question. After reading through the PRISM blurbs it looks like there is > some neat technology possibilities, unfortunately NO ONE I have talked to > knows anything about this machine (there are Apollo people). The Wall Street > Journal and other less reliable reports seem to indicate that the 10000 was > nothing more than a neat idea in someone's head. I can't believe that > this entire announcement was based entirely on simulations and speculations > of probable performance, assuming someone could build the thing. I am fascinated with ALL the Apollo people on the net, many that are SO quick to announce products, can not one answer a simple question of "whether the machine exists"? Have they touched it? Is it in alpha..beta? Having just finished reading an article about early announcements of machines (prior to their existence)...has this been the case with Apollo? Why is it that rumor about a machines non-existence must be the only information concerning an ANNOUNCED product? Apollo people on the net ... please feel free to answer. (After all I will take no information as information. :-( ---------------------- Naturally my opinions are my own and not those of my employers.
mishkin@apollo.uucp (Nathaniel Mishkin) (04/09/88)
I'm posting the following for Paul Bemis, Apollo Sr. Product Marketing
Manager:
------------------------------
The DN10000 is much more than a neat idea in someone's head! The DN10000
hardware is up and running and its performance results are meeting (and
exceeding) expectations.
The DN10000 has separate instruction and data caches. The caches are
virtually indexed, physically tagged, write-through caches. This hybrid
design combines both the address translation/cache fetch parallelism
of a virtual cache with the cache coherency of a physical cache. All
instructions, including LOAD and STORE, execute in a single cycle.
On the subject of multiprocessing and multiple threads, we use the OS
to spread multiple processes across multiple processors. Thus for
process-rich applications, no modifications to the code are needed to
take advantage of a multi-processor configuration. In addition, this
methodology works nicely as a work group shared compute resource running
multiple applications.
On the issue of dual Integer/FP processors: Each CPU has both an Integer
and a Floating Point processor. The FPU contains two math units, an
FP ALU and a multiplier. The data paths from CPU to the instruction
and data caches are both 64 bits wide. This allows PRISM to retire two
operations per cycle, one in the FP unit and one in the integer. In
addition, the instruction set supports compound 5-operand instructions
that can exercise both FP functional units at once. Thus, in one
instruction, an FP mult, FP add and an integer operation can be performed
-- potentially reading up to 6 source operands and writing up to 5
destination operands, in each of four processors, per cycle. The integer
processor can do floating-point loads. Thus, for vector operations such
as ax+b, the math can be computed by the compound instructions in the
FPU, while the IP does the loads. For LINPACK, FFT, etc. -- and even
some real programs! -- the processor runs at nearly its peak bandwidth.
The FPU supports integer operations; in cases where it makes sense, the
FPU and IP can do integer operations in parallel.
On Mach: Mach is being ported to the DN3000/4000 systems by The University
of Michigan. The PRISM architecture is well-suited for running Mach
and we will be investigating getting Mach ported to it (of course).
I hope this satisfies your curiosity. If you have any further questions,
detailed literature on the Series 10000 can be obtained from any Apollo
sales field office.
------------------------------
I'll add one comment of my own: We (well, at least I) am sometimes in
a quandary about what sort of postings should be replied to. This above
reply came only after a number of people got involved in deciding what,
if anything, should be said. I think that in general, people should
take no response from Apollo on a particular topic to mean "It would
be improper to respond", or "We stand by what we've said in public
announcements", or "We can't respond without getting a zillion people
involved to decide whether it's OK to respond". In such cases, all I
can suggest is that you talk to an Apollo sales office.
--
-- Nat Mishkin
Apollo Computer Inc.
Chelmsford, MA
{decvax,mit-eddie,umix}!apollo!mishkin