ylfink@water.UUCP (09/17/87)
DEPARTMENT OF COMPUTER SCIENCE
UNIVERSITY OF WATERLOO
SEMINAR ACTIVITIES
THEORY/VLSI SEMINAR
- Monday, September 21, 1987
Professor Jo C. Ebergen of Centrum voor Wiskunde en
Informatica, Amsterdam, will speak on ``Translating
Programs into Delay-Insensitive Circuits''.
TIME: 3:30 PM
ROOM: MC 6091A
ABSTRACT
We present a method for designing integrated circuits.
The goal of this method is to reduce circuit design to
program design.
We use a program notation that can be considered a
generalization of regular expressions and whose
semantics is based on traces. The notation includes
operations to express parallelism, tail recursion, and
the introduction of internal symbols.
A translation method of these programs is discussed
that yields delay-insensitive connections of circuit
elements, which are chosen from a small (finite) set of
basic elements. Delay-insensitive means that the
functional behavior of the connection, as specified in
the program, is insensitive to delays in wires or basic
elements. The translation is syntax directed and, if
the program satisfies a certain syntax, can be carried
out in such a way that the number of basic elements in
the connection is proportional to the length of the
program. A number of examples are discussed that
illustrate the topics of programming in this notation
and of translating these programs into delay-
insensitive circuits. The examples include several
counters, buffers, finite state machines, and token-
ring interfaces.