walsh@stdc01.UUCP (Mike Walsh) (03/27/90)
Does anybody know if a color monitor from a DN3000 can be used on a DN3500? If this is possible, is there anything more involved than pulling the color board out of the DN3000 and putting it in the DN3500? Have any of Mentor users out there had any experience using Quicksim for board level simulation? What do you think of it? Have you had to create your own models or is the library of parts that can be purchased sufficient? What size board are you simulating? How dense (# of components) have the boards been that you have simulated? What type of hardware are you running Quicksim on? We are thinking about simulating one of our upcomming boards. It will be roughly 15" square, 400+ active components, 1200-1300 including passive components. The data base is rather large and the board will have two ASICs on it. Can Quickparts be used to model the I/O of an ASIC? Can a DN3500 do an adequate job for us? If anyone can answer some of these or better yet all of these questions I would really appreciate it. Thanks ... Mike Mike Walsh Hardware Design Engineer/Apollo Admin on the side ;-} Star Technologies - Graphicon Products Division Reserach Triangle Park, NC walsh@stdc01 ...!uunet!mcnc!rti!stdc01!walsh
davidb@braa.inmos.co.uk (David Boreham) (03/29/90)
Some answers to some of Mike's questions:
1. Yes, monitors can be pulled and plugged between 3000, 3500, 3550, 4500 and probably
10000 (all using the 1024*800 color card that Mentor sell). I've no idea which
of our monitors started on which machine.
2. We use quicksim on 3000,3500,3550,4500 for simulating boards. First get the LAI
BLM library (very useful and necessary if you have anything more complex than
TTL parts). We also write BLMs for various things, including processors. However,
we recently found enough money to lay LAI to do those for us. I would seriously
consider writing BLMs for the ASICs so that your simulation runs at a decent
speed. Then drop in the gate-models for a final sim run.
3. Quickparts are pretty neat. However, I'm not sure how relavent they are to
modeling ASICs. They do not allow different delay paths through the model
under different circumstances, something which usually becomes necessary
with complex chips.
4. Your board sounds pretty large. We have only simulated fairly small designs
(100 ICs or so) and they run adequately fast on a 3550. Expanding actually
represents the major bind with our designs. From what I hear from other
users, putting a couple of 10000 gate ASICs in there will slow things down
quite considerably.
David Boreham, INMOS Limited | mail(uk): davidb@inmos.co.uk or ukc!inmos!davidb
Bristol, England | (us): uunet!inmos.com!davidb
+44 454 616616 ex 547 | Internet: davidb@inmos.com