burdick@hpspdra.HP.COM (Matt Burdick) (09/18/90)
Here's something from comp.sys.hp that I thought would be interesting to folks in this group as well: ----------------------------------------------------------- re: > Can anybody in workstation group reply to this note and explain to me > why HP cannot design a workstation that contains Industry "de-facto" > Standard SIMMS such as that used by PC's, Suns. DN2500 > etc...etc....etc ????????? I am not the RAM Product Marketing Engineer, but I got curious and had a chat with both that PME and the RAM designer in R&D. Part 1: Design The current 98229-series of SIMMs are used in the Model 345, 375 and the entire Series 400 family. They will also be used in the 68040-based versions of these boxes. During the design of the 345/375, WG investigated using PC-style SIMMs. We reluctantly choose a new design for the following reasons: * ECC - The 345/375 and s400 use error-correcting RAM exclusively. PC- style SIMMs are used in unprotected and parity-only designs, and are unsuitable for high-performance ECC designs. * Buffering - PC SIMMs are unbuffered, and provided inadequate timing and signal integrity margins for our SPU design. PC-SIMM designs also require that any buffering be on the CPU board, and that you must pre-install all the buffering needed for max possible RAM. On PC-SIMM designs, you are often paying for 64M RAM capability, even though you are only using 8M. * Performance - The HP SIMM design can support faster cycle times than the PC SIMM design. We expect this to become more significant when the 16 Mbit DRAMs become available. * Width - We wanted a 64-bit wide data path to memory, and a maximum electrical address space of 128 Mbytes (which we can now reach with the 98229E RAM product). * Footprint - The taller SIMMs used in the 375 and 400s are double-row, providing twice as much RAM on each connector. Had we gone with PC-SIMMs, we would probably have been limited to 64M. * Connector - Compared to PC edge-card connectors, pin&socket connectors used on the HP SIMM are more reliable over HP's shake&bake environmental range. This was not a critical factor in the decision, however. Part 2: Pricing * ECC - Adds 8 extra (Hamming) bits to every 64 data bits. * Buffering - aka "Pay as you go". The buffering on each SIMM board raises the cost of the SIMM, but reduces the cost of the CPU. * Connector - Pin&socket is more expensive than PC edge. The higher manufacturing cost accounts for part of the $/Mbyte price difference between HP add-on RAM and competing workstation add-on RAM. The other factors are the ordinary price-elasticity and other financial considerations that keep our stockholders contented. Nonetheless, our RAM PME is constantly re-evaluating our pricing, and I would not be surprised if a reduction occurs. > ...extortionate !!!! HP is very open about its prices and discount schedules, so no one should be surprised after the fact. And we can hardly be accused of "extortion" when there are so many third-party s300/400 plug-compatible RAM vendors out there to keep us honest. Regards, Hewlett-Packard Bob Niland 3404 East Harmony Road Internet: rjn@hpfcrjn.FC.HP.COM Fort Collins UUCP: [hplabs|hpu*!hpfcse]!hpfcrjn!rjn CO 80525-9599 This response does not represent the official position of, or statement by, the Hewlett-Packard Company. The above data is provided for informational purposes only. It is supplied without warranty of any kind. ----------
krowitz@RICHTER.MIT.EDU (David Krowitz) (09/19/90)
Oddly enough, Sun seems to be able to use PC SIMMS in the Sparcstation 1
and 1+ to achieve the sort of performance levels that HP is hoping to
hit (15 to 20 MIPS) when the 68040 chips become available. It's also
odd that the message refers to 64 bit data paths, at the sales literature
I have been given by our HP sales office states that the bus width is
32-bit data/32-bits address ("HP Apollo 9000 Models 400s and 433s
Technical Data", July 1990). 4 PC SIMMS installed in parallel as they
are in the DN2500, Sparcstation 1/1+, and other machines provides the
same 32-bit data path. As for the ECC ... yes, it does make for a more
reliable machine, theoretically. We have 5 DN2500's and about a dozen
Sparcstations in our department with at least 8 or 16 MB each, of which
roughly 50% is 3rd party RAM. They've been running for nearly a year
with 0 failures. I can live with that kind of error rate. As for the
form factor ... with 4 MB SIMMS now running about $75/MB in the PC
market I can stuff 64 MB inside my DN2500 for about the same cost of
buying a single 8MB add-on for a HP 9000. If space is really critical,
then look at what Sun did for the Sparc SLC -- they went with another
PC SIMM design which use 1Mx4 chips rather than 4Mx1 chips, and got
a 4MB SIMM with a 32-bit data path on a single card. This is apparently
a PC SIMM which was already on the price list of the company that we
order our 1MBx9 SIMMS from some 6 months prior to the announcement
of the Sparc SLC.
The fact is that the HP market is so much smaller than the PC market,
that any HP designed memory, 3rd party or not, will cost 4 to 5 times
what the same capacity will cost in the PC market. Period.
-- David Krowitz
krowitz@richter.mit.edu (18.83.0.109)
krowitz%richter.mit.edu@eddie.mit.edu
krowitz%richter.mit.edu@mitvma.bitnet
(in order of decreasing preference)steve-t@hpfcso.HP.COM (Steve Taylor) (09/22/90)
} It's also odd that the message refers to 64 bit data paths, at the sales } literature I have been given by our HP sales office states that the bus } width is 32-bit data/32-bits address ("HP Apollo 9000 Models 400s and 433s } Technical Data", July 1990). I'm not a hardware type, but I think the 32/32 refers to the I/O bus (i.e., plug-in cards and peripheral interfaces) while the 64 bit data path is from external cache to system RAM. } As for the ECC ... yes, it does make for a more reliable machine, } theoretically. We have 5 DN2500's and about a dozen Sparcstations in our } department with at least 8 or 16 MB each, } They've been running for nearly a year with 0 failures. For older HP Series 300s with separate memory cards, it was possible to get either Parity or ECC memory. However, parity was only supported up to some limit (? 24 or 32 Meg ?). Beyond that limit, only ECC memory was supported. This was based on observed behavior, not theory. I expect that now that the memory controller is built into the SPU board instead of on a separate memory board, that only one controller is provided, hence ECC for all. Steve taylor Disclaimer: I was not/am not involved in the design of this hardware. This is all hearsay/rumor. And in any case: NOT A STATEMENT, OFFICIAL OR OTHERWISE, OF THE HEWLETT-PACKARD COMPANY.