mwm@DECWRL.DEC.COM (Mike Meyer, Real Amigas have keyboard garages) (07/14/90)
In article <40088@mips.mips.COM>, mark@mips.COM (Mark G. Johnson) writes... >The June 1990 issue of _IEEE_Micro_ contains an article about the >Morotola 68040, written by some of its designers. The article agrees >with some of the advertising copy, saying "The sustained >performance level is 20 VAX-equivalent MIPS and 3 Mflops at a clock >speed of 25 MHz." (1st paragraph, 4th sentence). > >For the cache sizes actually used in the 68040 (4Kbytes), the >performance plotted in Figure 2 [68040 normalized to 68020] is in >the range 3.6X to 4.3X, depending upon the workload. Most of the >benchmarks shown are at 4.1X. Seems that the key word is "normalized". I.e. - they tweaked the numbers (for one of the two processors) so that, if the cache were the same size as the 68020, it would have the same performance as the 68020. Otherise, the numbers would be meaningless. In other words, the article is claiming that a 68020 with a 4K/4K cache would perform roughlly 4.1X faster than what you actually get, or that a 68040 with a 256byte/0byte cache would performat at <25% of the speed it currently performs at. Caveat: I haven't read the article, this is based on what was posted, which may not have included pertinent data. <mike