etstbos@dutrun (Erik-Jan Bos) (10/11/88)
CHDL 89 Call for Papers Ninth International Symposium on Computer Hardware Description Languages and their Applications June 19-21, 1989 Washington DC, USA The goal of this symposium is to bring together, from both industry and academia, the leading researchers and the best work in description languages. Each session will present a view of the challenges in an area and their impact on future CHDLs. LANGUAGES for hardware description and design: behavioral specification; hierarchical design; interchange languages; EDIF; VHDL; case studies of use in industry; use of programming languages; innovative languages and constructs. (Organizers: M. Barbacci, Carnegie-Mellon U.; R. Waxman, U. of Virginia) SYNTHESIS of logic designs and physical implementations from specifications; optimization techniques; system synthesis; silicon compilation; production systhesis. (Organizers: W. Grass, U. Passau; L. Trevillyan, IBM) VERIFICATION of specifications and implementations; design for verification; integrating verification with design; formal correctness demonstration. (Organizers: E. Clarke, Carnegie-Mellon U.; G. Milne, Texas Instruments) SIMULATION of descriptions at different levels; high level simulation; advanced software simulation; hardware simulation engines; simulation experience in industry. (Organizers: J. Bierbauer, AT&T; D. Beece, IBM; F. Klaschka, Siemens) TESTING of designs; test generation from functional specifications; test case analysis; tools for system level test; design and synthesis for testability. (Organizers: E. Aas, U. Trondheim; P. Prinetto, Politecnico di Torino) DESIGN SYSTEMS using hardware descriptions; tool integration; design environments; graphic tools; workstations; data bases; industry methodologies. (Organizers: F. Rammig, U. Paderborn; T. Hutchings, DEC) Five copies of the full length manuscript in English, not exceeding 20 double-spaced typewritten pages, should be sent to the Program Chairman to arrive no later than October 31, 1988. Refereeing will be carried out by the program committee. Authors of accepted papers will be notified by January 31, 1989. The final camera-ready version of accepted papers is due by April 1, 1989. A cash prize will be given for the best paper presented. For further information contact the general chairman or program chairman. GENERAL CHAIRMAN: PROGRAM CHAIRMAN: Dr. John A. Darringer Prof.dr. Franz J. Rammig IBM Research Division Universitat Paderborn Box 218 Warburger Str. 100 Yorktown Heights, NY 10598 D-4700 Paderborn USA Federal Republic of Germany 914-945-1018 (05251) 602069 Sponsored by the International Federation for Information Processing. Organized by IFIP TC-10 and IFIP WG 10.2, in cooperation with the Computer Society of the Institute of Electrical and Electronics Engineers (Design Automation Technical Committee), the Association for Computing Machinery (Special Interest Group on Design Automation), and the Gesellschaft fur Informatik. The Proceedings will be published in textbook form by Elsevier/North Holland. PROGRAM COMMITTEE: E. Aas (Norway), F. Anceau (France), M. Barbacci (USA), D. Borrione (France), E. Clarke (USA), S. Dasgupta (USA), W. Grass (W.Germany), R. Hartenstein (W.Germany), F. Klaschka (W.Germany), K. Koomen (Netherlands), G. Milne (Great Britain), A. Pawlak (Poland), R. Piloty (W.Germany), P. Prinetto (Italy), B. Reusch (W.Germany), W. Sherwood (USA), T. Sudo (Japan), T. Thorp (Great Britain), T. Uehara (Japan), M. Vernon (USA), K. Woelcken (W.Germany), A. Yamada (Japan), M. Yoeli (Israel) TREASURES: Louise H. Trevillyan LOCAL ARRANGEMENTS: Ronald Waxman PUBLICITY: William H. Joyner, Jr. REGISTRATION: Ronald Williams