[news.announce.conferences] VLSI Implementation of Neural Nets Workshop

marwan@extro.ucc.su.oz.au (Marwan Jabri) (10/11/88)

                               Neural Networks -
                         Their Implementation in VLSI

                             5-6 November 1988

                         Sydney University Electrical
                                 Engineering

                                 Sponsored by
                      Electrical Engineering Foundation,
                            University of Sydney

Introduction
-------------
Research in artificial neural systems or, more commonly, artificial neural
networks (NNs) has gained new momentum following a decline in the late
1960s as a result of unsuccessful attempts at implementation.  This revival
is attributable in part to recent advances in microelectronics, which
enable reseachers to implement NN systems previously considered
unrealistic, too complex or uneconomic.  NNs promise to contribute to the
problem solving areas where conventional digital computers, with processing
elements switching in nanoseconds, do not perform as well as ``biological''
neural systems that have electrochemical devices responding in
milliseconds.

These problem solving areas share important attributes in that they may be
performed on noisy and distorted data. Vision, speech recognition and
combinatorial optimisation are examples of such problems.

VLSI implementations of NN systems have begun to appear as a natural
solution to building large and fast computational systems.  AT&T Bell Labs
and California Institute of Technology (Caltech) are two of the leading
research institutions where VLSI NN systems have been developed recently.
Successful development of VLSI NNs requires a robust design methodology.

Objectives of the Workshop
--------------------------
The workshop is organised by the Systems Engineering and Design Automation
Laboratory (SEDAL), Sydney University Electrical Engineering (SUEE) and is
sponsored by the Electrical Engineering Foundation.  The workshop will
present to academics, researchers and engineers state-of-the-art
methodologies for the implementation of VLSI NN systems. It will also
introduce three important application areas: vision, speech and
optimisation.

Keynote Speakers
----------------
The workshop will feature speakers from two leading overseas institutions
in the area of VLSI implementation of NNs. These speakers will cover 6
important lectures of the program.

Dr. Larry Jackel
----------------
Head Device Structures Research Department, AT&T Bells Labs.

Dr. Larry Jackel is a world expert on VLSI implementation of artificial
NNs. He is leader of a group working on the implementation of VLSI chips
with several hundreds of neurons for image classification, pattern
recognition and associative memories. Dr Jackel has over 80 technical
publications in professional journals and seven US patents.  He is
recipient of the 1985 IEEE Electron Device Society Paul Rappaport Award for
best paper. Dr. Jackel is author and/or co-author of several invited papers
on NN design, in particular, recently in the special issue on NNs of the
IEEE Computer magazine (March 88).

Ms. Mary Ann Maher
------------------
Member of the technical staff, Computer Science Department, Caltech.

Ms Mary Ann Maher is member of the research group headed by professor
Carver Mead a world authority on the VSLI implementation of NNs. The best
and widely known work of this group is the design and the implementation of
VLSI chips for the modelling of the retina and the cochlea. Ms Maher is
expert in the area of modelling and simulation of VLSI implementations of
NNs. She has participated as an invited speaker at several conferences and
workshops on VLSI implementation of NNs including the IEEE International
Symposium on Circuits and Systems, 1988 at Helsinki.

Invited Speakers
----------------
The seminar will also feature speakers from several Australian research
institutions with a diverse background who will give the participants a
broad overview of the subject.

Prof. Max Bennett, Head, Neurobiology Research Center, University of Sydney
Prof. Bennett will present an introduction to artificial neural networks.

Prof. Graham Rigby, Chairman, Departmemt of Electrical Engineering and
Computer Science, University of New South Wales
Prof. Rigby will present an introduction to important MOS building blocks
used in  the VLSI implementation of NNs.

Other lectures and tutorials will be presented by the following speakers
from Sydney University Electrical Engineering:
Peter Henderson, SEDAL
Marwan Jabri, SEDAL
Dr. Peter Nickolls, Laboratory for Imaging Science and Engineering
Clive Summerfield, Speech Technology Research

Venue
-----
The course will be held in Lecture Theatre 450, Sydney University
Electrical Engineering on November 5 and 6, 1988.

Registration
------------
The workshop registration cost is $400 for a private institution, $250 for
an educational institution and $100 for students.  The registration fee
covers attendance at the workshop, workshop notes and two lunches. To
attend the workshop a registration form with payment must be returned by
October 15, 1988.

Preliminary Program
-------------------
Day 1- Saturday 5 November

9:00-9:45 Introduction to Artificial Neural Networks
    Short historical background of artificial neural networks,
    modelling of a neurode, common network structures,
    Rumelhart and Hopfield models, learning techniques.

9:45-10:30 Introduction to the Applications of Artificial Neural Networks
    The use of neural networks in image, speech and optimisation, hardware
    implementations, software simulations.

10:30-11:00 Coffee Break

11:00-12:00 Introduction to MOS VLSI Design MOS technology, MOS design
    process, MOS capacitors and resistors, design of a simple amplifier,
    design of differential amplifiers, simple digital circuits, system
    design.

12:00-1:00 Architectures and Techniques for VLSI Implementation of Neural
     Networks

1:00-2:30 Lunch

2:30-3:30 An Introduction to Computer Vision

3:30-4:00 Coffee Break

4:00-5:00 An Introduction to Speech Recognition


Day 2- Sunday 6 November

9:00-10:00 VLSI Neural Network Design- Case Study I: The Retina Chip Design

10:00-11:00 VLSI Neural Network Design- Case Study II: The Cochlea Chip Design

11:00-11:30 Coffee Break

11:30-12:30 VLSI Design - Tutorial
    Design of common MOS structures such as latches, op amps and
    resistors.

12:30- 2:00 Lunch

2:00-3:00 NNs System Design - Tutorial
    Example of NNs systems, computer simulation of several
    NNs models.

3:00-3:30 Coffee Break

3:30-5:00 VLSI Implementation of NNs - Tutorial
    Design of a simple neurode in a cross-bar NN model.


For more information please contact:

Marwan Jabri,
SEDAL, Sydney University Electrical Engineering,
NSW 2006
Tel: 02 692 2240 Fax: 02 692 2012
ACSnet marwan@extro.ucc.su.oz