mfreeman@cascade.stanford.edu (Martin Freeman) (02/14/89)
HOT CHIPS SYMPOSIUM Call for Participation Stanford University, June 26-27, 1989 Sponsored by: IEEE Computer Society Technical Committee on Microprocessors The first HOT Chips Symposium will bring together researchers and developers of high performance devices. The informal format will feature presentations, rather than papers, and will encourage interaction with speakers. Design, system performance, and implementation details as well as technology will be covered, which relate to the following topics: * Microprocessors * Floating Point Engines * Graphics Engines * Embedded Controllers * I/O Processors * Special Purpose Processors * New Process Technology Methods * Performance Measures Those interested in discussing the results of their work at the Symposium should submit a presentation proposal to either of the Program Co-Chairs: David Ditzel Jack Grimes Sun Microsystems, A7-41 Intel Corporation, SC4-40 2550 Garcia Avenue 3065 Bowers Avenue Mountain View, CA 94043 Santa Clara, CA 95051 dave@sun.com jgrimes@smdvx1.intel.com Program Committee: Forest Baskett, Silicon Graphics David Ditzel, Sun Microsystems David Goldberg, Xerox PARC Jack Grimes, Intel John Mashey, MIPS Computer Systems John Moussouris, Consultant John Wakerley, Consultant For more information write or call: Dr. Robert Stewart Stewart Research Enterprises 1658 Belvoir Drive Los Altos, CA 94022 (415)-941-6699
freeman@cis.stanford.edu (Martin Freeman) (04/26/89)
HOT CHIPS SYMPOSIUM Stanford University, Kresge Auditorium Sponsored by the IEEE Computer Society Technical Committee on Microprocessors June 26-27, 1989 ADVANCE PROGRAM Organizing Committee: General Chairman: Robert Stewart, Stewart Research Enterprises Program Co-Chairman: David Ditzel, Sun Microsystems Program Co-Chairman: Jack Grimes, Intel Finance Chairman: Martin Freeman, Philips Research Laboratories Registration Chairman: Hasan Alkhatib, University of Santa Clara Publicity Chairman: Glen Langdon, U. C. Santa Cruz Program Committee: Forest Baskett, Silicon Graphics David Ditzel, Sun Microsystems David Goldberg, Xerox PARC Jack Grimes, Intel Mark Horowitz, Stanford University John Mashey, MIPS Computer Systems John Wakerly, Stanford University MONDAY --- June 26, 1989 08:00-08:45 Onsite Registration 08:45-09:00 Welcome & Opening Remarks, R. Stewart, General Chairman 09:00-10:45 New SPARC CPUs, Session Chair: D. Ditzel, Sun Microsystems * The Cyress SPARC Family, R. Ross, Ross Technology * The BIT ECL SPARC Chip, A. Agrawal, Sun Microsystems * SPARC in GaAs Technology, P. Gerskovitch & P. Wilson, Prisma 10:45-11:00 BREAK 11:00-12:30 RISC CPU Update, Session Chair: Forest Basket, Silicon Graphics * Fujitsu SPARC Chip Set Update, Fujitsu * Highly Integrated SPARC Chip, D. McGregor, Solbourne Computer * 88K Family Update, M. Alsup, Motorola * Clipper Update, Intergraph 12:30-01:30 LUNCH 01:30-02:15 Keynote Address: "Bumps on the Path to Floating Point Progress," W. Kahan, U. C. Berkeley 02:30-03:30 New Processor Architectures, Session Chair: J. Grimes, Intel * Architecture of the i860, L. Kohn, Intel 03:30-04:00 BREAK 04:00-05:30 Floating Point Processors, Session Chair: D. Goldberg, Xerox PARC * ABACUS SPARC Coprocessor, A. Samuels & M. Birman, Weitek * Texas Instruments TMS390C602 FPU Architecture, Texas Instruments * The MIPS R3010 FPU, J. Mashey, MIPS Computer Systems 06:00-08:00 RECEPTION: Bowman Oak Grove Near Tressider Union TUESDAY --- June 27, 1989 08:30-10:30 New CISC CPUs, Session Chair: M. Horowitz, Stanford University * Motorola's 68040 Processor Architecture, Motorola * Intel's 80486 Processor Architecture, J. Crawford, Intel * Architecture for a Single-Cycle VLSI CISC, D. Stiles, NexGen 10:30-10:45 BREAK 10:45-12:30 Embedded CPUs, Session Chair: J. Wakerly, Stanford University * Intel's 960--A Super Scalar Architecture for Embedded Control, S. McGready, Intel * Meeting the Embedded Challenge: NS32GX32, The New Generation, J. Levy, National * AMD 29000 Update, M. Krell, Advanced Micro Devices 12:30-01:30 LUNCH 01:30-03:00 Graphics Coprocessors, Session Chair: J. Grimes, Intel * TI 34020/82 Chip Set for High Performance Graphics, M. Asal, Texas Instruments * Architecture for High Performance Graphics, J. Blair, National * The Sun GX Graphics Accelerator Chip, C. Priem, Sun Microsystems * Geometry Engine Microsystems Update, F. Baskett, Silicon Graphics 03:00-03:30 BREAK 03:30-05:00 Panel: Compiler Issues with HOT Chips, Session Chair: J. Mashey, MIPS Computer Systems * S. Glanville, Silicon Valley Software Trio * S. Johnson, Ardent Computer * T. Pennello, MetaWare * Others 05:00- ADJOURN HOUSING INFORMATION: Limited Housing is available on the Stanford University Campus in Florence Moore Hall, a short walk from Kresge Auditorium where the Symposium will be held. A two-day package includes housing for two nights and two breakfasts; the cost is $90. Housing is in student residences with central lavatory facilities. Stanford requires a $40 key deposit which is refunded upon checkout. Housing at Stanford University must be arranged by May 21. Housing is also available at numerous motels and hotels on the Peninsula in Palo Alto, Menlo Park, Mountain View, and Los Altos which are close to Stanford University. A list with addresses and telephone numbers and rates is available. A block of rooms is also available at the Holiday Inn, 625 El Camino Real in Palo Alto, (415) 328-2800. Mention the Hot Chips Symposium for the special group rate of $84/day single or $94/day double. If you would like additional housing information, please check the housing information request area on the registration form. REGISTRATION FEES: ______________________________________________________________________________ | | Postmarked by | Subsequent | | | May 21, 1989 | Registration| |____________________|________________________________|______________________| | | | | | IEEE/CS or | $145 | $180 | | ACM Member | | | | | | | | Non-Member | $180 | $225 | | | | | | Student | $65 | $100 | | | | | |____________________|________________________________|______________________| Checks, travelers checks, or money orders in U.S. dollars drawn on U.S. banks only. Symposium registration covers attendance, one copy of symposium notes, parking, two lunches, coffee breaks, and a reception on Monday evening, June 26. Housing must be arranged for and paid for separately. See above section on housing. For those out-of-town attendees arriving on Sunday, registration also includes a tour of the Stanford Linear Accelerator Center (SLAC) 2:00 PM with transportation departing from Florence Moore Hall at 1:30 PM. From 5:30-7:30 on Sunday, there will be a small wine and cheese reception in the Cardenal Lounge in Florence Moore Hall. _______________________________________________________________________________ | | | REGISTRATION FORM: Hot Chips Symposium | | | | Check Made Out To: Hot Chips Symposium | | | | Mail To: Hasan Alkhatib | | Department of EECS | | University of Santa Clara | | Santa Clara, CA 95053 | | | | | | | | | |Name_________________________________________________________________________| | | |IEEE/CS or ACM Member No.____________________________________________________| | | |Organization_________________________________________________________________| | | |Phone No.____________________________________________________________________| | | |Address______________________________________________________________________| | | |_____________________________________________________________________________| | | |_____________________________________________________________________________| | | | | |Amount Enclosed ____________ Please send housing information___________| | | |I plan to arrive early for the Stanford Linear Accelerator Tour______________| | | |_____________________________________________________________________________| QUESTION? MORE INFORMATION? Call, Write, or FAX: (415) 941-6699 (To FAX, push the asterisk key after the message.) Robert G. Stewart, General Chair Stewart Research Enterprises 1658 Belvoir Drive Los Altos, CA 94022