VAIDYA@ecs.umass.edu (nitin Vaidya) (11/08/89)
Call for Papers : 3rd International Workshop on VLSI Design, Bangalore, India January 6-9 1990 This is the third workshop in a series of technical meetings now planned to be held annually, to provide a forum for researchers and engineers to present and discuss their work on VLSI design, CAD and Test. Topics of interest include but are not limited to layout and routing, logic and circuit simulation, CAE/CAD systems, silicon compilation, testing and test generation, design for testability, and VLSI design in the Asian environment. The last workshop, held in December 1988, attracted over two hundred participants, a third of whom were from overseas. The format of the workshop is informal to promote discussion. However, a digest of presented papers will be available to registered participants. To submit a paper, please prepare a camera-ready typed or printed manuscript not exceeding five pages 8.5"x11" in size, including references and figures. The paper should clearly state the problem, the proposed solution, and results. Send four copies of your manuscript to : Professor Adit Singh, Electrical and Computer Engineering, University of Massachusetts, Amherst MA 01003 USA Tel: (413) 545-0188 OR Professor L M Patnaik, Computer Science and Automation, Indian Institute of Science, Bangalore 560012 India Tel: (812) 344411 ext. 2520 Submission deadline has been extended to November 10, 1989. In a cover letter, please identify the presenting author, and include a complete address, telephone number, and also e-mail address and/or FAX number if available. If you would like to attend but not present a paper, write to one of the workshop coordinators to receive registration and travel information. Please include a paragraph outlining your experience in VLSI. -- Good health is merely the slowest rate at which one can die.