ain@j.cc.purdue.edu (Patrick White) (02/09/88)
Program Name: dasm (docs)
Submitted By: dillon%cory.Berkeley.EDU@ucbvax.berkeley.edu (Matt Dillon)
Summary: A cross assembler for 6502, 68705, 6803, and HD6303 (extension
of 6803)
Poster Boy: Pat White (ain@j.cc.purdue.edu)
Read :-)
NOTES:
Matt suggests that one use the ram disk for everything... but one can
still use a floppy if one does not have that much free ram laying about.
-- Pat White (co-moderator comp.sources/binaries.amiga)
UUCP: j.cc.purdue.edu!ain BITNET: PATWHITE@PURCCVM PHONE: (317) 743-8421
U.S. Mail: 320 Brown St. apt. 406, West Lafayette, IN 47906
========================================
# This is a shell archive.
# Remove everything above and including the cut line.
# Then run the rest of the file through sh.
#----cut here-----cut here-----cut here-----cut here----#
#!/bin/sh
# shar: Shell Archiver
# Run the following text with /bin/sh to create:
# README
# DASM.DOC
# FTOHEX.DOC
# This archive created: Mon Feb 8 13:11:21 1988
# By: Patrick White (PUCC Land, USA)
echo shar: extracting README '(1526 characters)'
cat << \SHAR_EOF > README
DASM V2.0
(c)Copyright 1988 Matthew Dillon, All Rights Reserved.
FILES:
README this file
DASM.DOC documentation for the assembler
FTOHEX.DOC documentation for intel hex converter
DASM The assembler
FTOHEX assmblyoutput -> intelhex format converter
suite6502.asm test suite for 6502
suite6303.asm test suite for 6805/6303
suite68705.asm test suite for 68705
example.asm example assembly file
Makefile Makefile, Aztec C
*.c *.h source code (in C). 32 bit ints, Aztec C.
ftohex.c source code for FTOHEX 32 bit ints Aztec C.
--------------- SUPPORTED MICRO PROCESSORS ---------------
6502: ORDER LSB,MSB A<7:0> X<7:0> Y<7:0> RelAddr: .+ilen+offset
68705: ORDER MSB,LSB A<7:0> X<7:0> RelAddr: .+ilen+offset
6805/6303: ORDER MSB,LSB A<7:0> B<7:0> X<15:0> RelAddr: .+ilen+offset
ADDRESSING MODES 6502 68705 6803
BYTES
2 implied x x x
2 immediate.8 #byte x x x
3 immediate.16 #word x
2 byteaddr byte x x x
2 byteaddr,x byte,x x x x
2 byteaddr,y byte,y x
3 wordaddr word x x x
3 wordaddr,x word,x x x
3 wordaddr,y word,y x
2 relative byte x x x
2 ind.byte.x (byte,x) x
2 ind.byte.y (byte),y x
3 ind.word (word) x
1 0,x [0],x x
2 bitmod #no,badr x baseinst + 2*bitno
3 bitbramod #no,badr,rel x baseinst + 2*bitno
NOTE: 6303 instruction extensions over the 6805 are:
AIM OIM EIM TIM XGDX SLP
SHAR_EOF
if test 1526 -ne "`wc -c README`"
then
echo shar: error transmitting README '(should have been 1526 characters)'
fi
echo shar: extracting DASM.DOC '(17291 characters)'
cat << \SHAR_EOF > DASM.DOC
DOCUMENTATION FOR DASM V2.0, a high level macro cross assembler for:
-6502
-68705
-6803
-HD6303 (extension of 6803)
Soon will work for 68HC11 (next ver)
(C)Copyright 1987,1988 Matthew Dillon, All Rights Reserved
Publicly distributable for non-profit only. Must be distributed
as is, with NO CHANGES to the documentation or code. Over the last
year my work has included writing software to drive small single-chip
microcomputers for various things (remote telemetry units, for
instance). I have had need to program quite a few different processors
over that time.
At the beginning, I used an awful macro assembler running on an IBM-PC.
I *really* wanted to do it on my Amiga. Thus the writing of this
program.
Feel free to suggest other similar processors for me to add to the list!
The processor type is specified with a pseudo-op (see below). This
assembler produces only binary output in one of three formats described
below. In general, one has a master assembly file which INCLUDEs all
the modules.
Also provided is FTOHEX which converts an output file in one of the
three formats to an intel-hex format suitable for many intelligent
prom programmers (I have a GTEK).
YES it's packed with features!
COMMAND LINE:
asm srcfile [options]
options: -f# select output format 1-3 (default 1, see below)
-oname select output file name (else a.out)
-lname select list file name (else none generated)
-sname select symbol dump file (else none generated)
-v# select verboseness 0-4 (default 0, see below)
-d debug mode
-DSYMBOL predefine a symbol, set to 0
-DSYMBOL=EXPRESSION predefine a symbol, set to exp
Note: file names should be in RAM: for speed. If a list file is
specified, it should be in the RAM: disk (assembly is slowed down
quite a bit anyway).
Example: asm master.asm -f2 -oram:out -lram:list -v3 -DVER=4
FORMAT OPTIONS:
1 (DEFAULT)
The output file contains a two byte origin in LSB,MSB order, then
data until the end of the file.
Restrictions: Any instructions which generate output (within an
initialized segment) must do so with an ascending PC. Initialized
segments must occur in ascending order.
2 RAS (Random Access Segment)
The output file contains one or more hunks. Each hunk consists
of a 2 byte origin (LSB,MSB), 2 byte length (LSB,MSB), and that
number of data bytes. The hunks occur in the same order as
initialized segments in the assembly. There are no restrictions
to segment ordering. The next hunk begins after the previous
hunk's data, until the end of the file.
3 RAW (Raw)
The output file contains data only (format #1 without the 2 byte
header). Restrictions are the same as for format #1.
Format 3 RAW (Raw format)
Same as format 1, but NO header origin is generated. You get
nothing but data.
VERBOSE OPTIONS:
0 (default)
Only warnings and errors are generated
1
-Segment list information generated after each pass
-Include file names are displayed
-statistics on why the assembler is going to make another pass
R1,R2 reason code: R3
where R1 is the number of times the assembler encountered
something requiring another pass to resolve. R2 is the
number of references to unknown symbols which occured in the
pass (but only R1 determines the need for another pass). R3
is a BITMASK of the reasons why another pass is required.
See the end of this document for bit designations.
2
mismatches between program labels and equates are displayed
on every pass (usually none occur in the first pass unless you
have re-declared a symbol name).
displayed information for symbols:
???? = unknown value
str = symbol is a string
eqm = symbol is an eqm macro
(r) = symbol has been referenced
(s) = symbol created with SET or EQM pseudo-op
3
Unresolved and unreferenced symbols are displayed every pass
(unsorted, sorry)
4
An entire symbol list is displayed every pass to STDOUT.
(unsorted, sorry)
PROCESSOR MODEL:
The processor model is chosen with the PROCESSOR pseudo-op and should
be the first thing you do in your assembly file. Different processor
models use different integer formats (see below). The word order does
not effect the headers in the output files (-f1 and -f2), which are
always LSB,MSB. The word ordering effects all address, word, and
long generation.
Only one PROCESSOR pseudo-op may be declared in the entire assembly,
and should be the first thing encountered.
-6502 LSB,MSB
-68HC11 MSB,LSB (next release)
-68705 MSB,LSB
-6803 MSB,LSB
-HD6303 MSB,LSB
SEGMENTS:
The SEG pseudo-op creates/sets the current segment. Each segment has
it's own origin and is optionally an 'uninitialized' segment.
Unitialized segments produce no output and have no restrictions. This
is useful for determining the size of a certain assembly sequence
without generating code, and for assigning RAM to labels.
GENERAL:
Most everything is recursive. You cannot have a macro DEFINITION
within a macro definition, but can nest macro calls, repeat loops,
and include files.
The other major feature in this assembler is the SUBROUTINE pseudo-op,
which logically separates local labels (starting with a dot). This
allows you to reuse label names (for example, .1 .fail) rather than
think up crazy combinations of the current subroutine to keep it all
unique.
Almost nothing need be resolved in pass 1. The assembler will make
multiple passes in an attempt to resolve the assembly (including just
one pass if everything is resolved immediately).
PSEUDOPS:
INCLUDE "name"
Include another assembly file.
[label] SEG[.U] name
This sets the current segment, creating it if neccessary. If
a .U extension is specified on segment creation, the segment
is an UNINITIALIZED segment. The .U is not needed when going
back to an already created uninitialized segment, though it
makes the code more readable.
[label] DC[.BWL] exp,exp,exp ...
Declare data in the current segment. No output is generated if
within a .U segment. Note that the byte ordering for the
selected processor is used for each entry.
The default size extension is a byte.
[label] DS[.BWL] exp[,filler]
declare space (default filler is 0). Data is not generated if
within an uninitialized segment. Note that the number of bytes
generated is exp * entrysize (1,2, or 4)
The default size extension is a byte.
[label] DV[.BWL] eqmlabel exp,exp,exp....
This is equivalent to DC, but each exp in the list is passed
through the symbolic expression specified by the EQM label.
The expression is held in a special symbol dotdot '..' on each
call to the EQM label.
See EQM below
[label] HEX hh hh hh..
This sets down raw HEX data. Spaces are optional between bytes.
NO EXPRESSIONS are allowed. Note that you do NOT place a $
in front of the digits. This is a short form for creating
tables compactly. Data is always layed down on a byte-by-byte
basis.
Example: HEX 1A45 45 13254F 3E12
ERR
Abort assembly.
[label] ORG exp[,DefaultFillVal]
This pseudop sets the current origin. You can also set the
default fill character (a byte value) with this pseudoop. NOTE
that no filler is generated until the first data-generating
opcode/psueoop is encountered after this one. Sequences like:
org 0,255
org 100,0
org 200
dc 23
will result in 200 zero's and a 23. Use DS or ALIGN to
specifically generate data output. This allows you to specify
some ORG, then change your mind and specify some other (lower
address) ORG without causing an error (assuming nothing is
generated inbetween).
[label] RORG exp
This activates the relocatable origin. All generated
addresses, including '.', although physically placed at the
true origin, will use values from the relocatable origin.
While in effect both the physical origin and relocatable origin
are updated.
The relocatable origin can skip around (no limitations). The
relocatable origin is a function of the segment. That is, you
can still SEG to another segment that does not have a
relocatable origin activated, do other (independant) stuff
there, and then switch back to the current segment and continue
where you left off.
PROCESSOR model
do not quote. model is one of: 6502,6803,HD6303,68705,68HC11
Can only be executed once, and should be the first thing
encountered by the assembler. the 68HC11 will be available
next release.
ECHO exp,exp,exp
The expressions (which may also be strings), are echod on the
screen and into the list file
[label] REND
Deactivate the relocatable origin for the current segment.
Generation uses the real origin for reference.
[label] ALIGN N[,fill]
Align the current PC to an N byte boundry. The default
fill character is 0.
[label] SUBROUTINE name
This isn't really a subroutine, but a boundry between sets of
temporary labels (which begin with a dot). Temporary label
names are unique within segments of code bounded by SUBROUTINE:
CHARLIE subroutine
ldx #10
.1 dex
bne .1
BEN subroutine
ldx #20
.1 dex
bne .1
symbol EQU exp
The expression is evaluated and the result assigned to the
symbol.
symbol EQM exp
The STRING representing the expression is assigned to the
symbol. Occurances of the label in later expressions causes the
string to be evaluated for each occurance. Also used in
conjuction with the DV psuedo-op.
symbol SET exp
Same as EQU, but the symbol may be reassigned later.
MAC name
Declare a macro. lines between MAC and ENDM are the macro.
You cannot recursively declare a macro. You CAN recursively
use a macro (reference a macro in a macro). No label is
allowed to the left of MAC or ENDM.
Arguments passed to macros are referenced with: {#}. The first
argument passed to a macro would thus be {1}. You should
always use LOCAL labels (.name) inside macros which you use
more than once. {0} represents an EXACT substitution of the
ENTIRE argument line.
ENDM
end of macro def. NO LABEL ALLOWED ON THE LEFT!
MEXIT
Used in conjuction with conditionals. Exits the current macro
level.
[label] IFCONST exp
Is TRUE if the expression result is defined. No error is
generated if the expression is undefined. Is FALSE otherwise.
[label] IFNCONST exp
Is TRUE if the expression result is undefined. No error is
generated if the expression is undefined. Is FALSE otherwise.
[label] IF exp
Is TRUE if the expression result is defined AND non-zero.
Is FALSE if the expression result is defined AND zero.
Neither IF or ELSE will be executed if the expression result
is undefined.
[label] ELSE
ELSE the current IF.
[label] ENDIF
[label] EIF
Terminate an IF. ENDIF and EIF are equivalent.
[label] REPEAT exp
[label] REPEND
Repeat code between REPEAT/REPEND 'exp' times. if exp == 0,
the code repeats forever. exp is evaluated once.
Y SET 0
REPEAT 10
X SET 0
REPEAT 10
DC X,Y
X SET X + 1
REPEND
Y SET Y + 1
REPEND
generates an output table: 0,0 1,0 2,0 ... 9,0 0,1 1,1 2,1
... 9,1, etc...
Labels within a REPEAT/REPEND should be temporary labels with a
SUBROUTINE pseudoop to keep them unique.
The Label to the left of REPEND is assigned AFTER the loop
FINISHES.
[label] XXX[.force] operand
XXX is some mnemonic, not necessarily three characters long.
The .FORCE optional extension is used to force specific
addressing modes (see below).
GENERAL:
The label will be set to the current ORG/RORG either before or after
a pseudo-op is executed. Most of the time, the label to the left of a
pseudo-op is the current ORG/RORG. The following pseudo-op's labels are
created AFTER execution of the pseudo-op:
SEG, ORG, RORG, REND, ALIGN
EXTENSIONS:
FORCE extensions are used to force an addressing mode. In some cases,
you can optimize the assembly to take fewer passes by telling it the
addressing mode. Force extensions are also used with DS,DC, and DV
to determine the element size. NOT ALL EXTENSIONS APPLY TO ALL
PROCESSORS!
example: lda.z charlie
i -implied
ind -indirect word
0 -implied
0x -implied indexing (0,x)
0y -implied indexing (0,y)
b -byte address
bx -byte address indexed x
by -byte address indexed y
w -word address
wx -word address indexed x
wy -word address indexed y
l -longword (4 bytes) (DS/DC/DV)
r -relative
u -uninitialized (SEG)
First character equivalent substitutions:
b z d (byte, zeropage, direct)
w e a (word, extended, absolute)
ASSEMBLER PASSES:
The assembler may have to make several passes through the source
code to resolve all generation. The number of passes is not
limited to two. Since this may result in an unexpected, verbose
option 2, 3, and 4 have been provided to allow determination of the
cause. The assembler will give up if it thinks it can't do the
assembly in *any* number of passes.
Error reporting could be better....
EXPRESSIONS:
[] may be used to group expressions. The precedense of operators
is the same as for the C language in almost all respects. Use
brackets [] when you are unsure. The reason () cannot be used to
group expressions is due to a conflict with the 6502 and other
assembly languages.
Some expressions, such as ||, can return a resolved value even if
one of the expressions is not resolved. Operators are as follows:
NOTE WELL: Some operations will result in non-byte values when a
byte value was wanted. For example: ~1 is NOT $FF, but
$FFFFFFFF. Preceding it with a > (take LSB of) will solve the
problem. ALL OPERATIONS ARE CARRIED OUT IN 32 BITS.
prec UNARY
20 ~exp one's complement.
20 -exp negation
20 !exp not expression (returns 0 if exp non-zero, 1 if exp zero)
20 <exp take MSB byte of a 16 bit expression
20 >exp take LSB byte of an expression
BINARY
19 * multiplication
19 / division
19 % mod
18 + addition
18 - subtraction
17 >>,<< shift right, shift left
16 >,>= greater, greater equal
16 <,<= smaller, smaller equal
15 == equal to. Try to use this instead of =
15 = exactly the same as == (exists compatibility)
15 != not equal to
14 & logical and
13 ^ logical xor
12 | logical or
11 && left expression is true AND right expression is true
10 || left expression is true OR right expression is true
9 ? if left expression is true, result is right expression,
else result is 0. [10 ? 20] returns 20
8 [] group expressions
7 , separate expressions in list (also used in
addressing mode resolution, BE CAREFUL!
Constants:
nnn decimal
0nnn octal
%nnn binary
$nnn hex
'c character
"cc.." string (NOT zero terminated if in DC/DS/DV)
[exp]d the constant expressions is evaluated and it's decimal
result turned into an ascii string.
Symbols:
.. -holds evaluated value in DV pseudo op
.name -represents a temporary symbol name. Temporary symbols
may be reused inside MACROS and between SUBROUTINES
. -current program counter (as of the beginning of the
instruction).
name -beginning with an alpha character and containing letters,
numbers, or '_'. Represents some global symbol name.
WHY codes:
Each bit in the WHY word (verbose option 1) is a reason (why
the assembler needs to do another pass), as follows:
bit 0 expression in mnemonic not resolved
1 -
2 expression in a DC not resolved
3 expression in a DV not resolved (probably in DV's EQM symbol)
4 expression in a DV not resolved (could be in DV's EQM symbol)
5 expression in a DS not resolved
6 expression in an ALIGN not resolved
7 ALIGN: Relocatable origin not known (if in RORG at the time)
8 ALIGN: Normal origin not known (if in ORG at the time)
9 EQU: expression not resolved
10 EQU: value mismatch from previous pass (phase error)
11 IF: expression not resolved
12 REPEAT: expression not resolved
13 a program label has been defined after it has been
referenced (forward reference) and thus we need another
pass
14 a program label's value is different from that of the
previous pass (phase error)
Certain errors will cause the assembly to abort immediately, others
will wait until the current pass is other. The remaining allow another
pass to occur in the hopes the error will fix itself.
SHAR_EOF
if test 17291 -ne "`wc -c DASM.DOC`"
then
echo shar: error transmitting DASM.DOC '(should have been 17291 characters)'
fi
echo shar: extracting FTOHEX.DOC '(549 characters)'
cat << \SHAR_EOF > FTOHEX.DOC
FTOHEX Convert assembly output file to INTEL-HEX format suitable for, say,
a GTEK prom programmer.
FTOHEX format infile outfile
Example:
DASM -f2 example.asm -oram:example.out
FTOHEX 2 ram:example.out ram:example.hex
This program converts and output file generated by DASM to the Intel
hex-ascii format. You must specify the format you used when you
assembled the source for FTOHEX to properly read the out file.
Generally format 2 is used for assembly (see DASM.DOC) as this
generates the smallest hex file.
SHAR_EOF
if test 549 -ne "`wc -c FTOHEX.DOC`"
then
echo shar: error transmitting FTOHEX.DOC '(should have been 549 characters)'
fi
# End of shell archive
exit 0ain@j.cc.purdue.edu (Patrick White) (02/09/88)
Program Name: dasm (part 1 of 2)
Submitted By: dillon%cory.Berkeley.EDU@ucbvax.berkeley.edu (Matt Dillon)
Summary: A cross assembler for 6502, 68705, 6803, and HD6303 (extension
of 6803)
Poster Boy: Pat White (ain@j.cc.purdue.edu)
Tested.
NOTES:
-- Pat White (co-moderator comp.sources/binaries.amiga)
UUCP: j.cc.purdue.edu!ain BITNET: PATWHITE@PURCCVM PHONE: (317) 743-8421
U.S. Mail: 320 Brown St. apt. 406, West Lafayette, IN 47906
========================================
# This is a shell archive.
# Remove everything above and including the cut line.
# Then run the rest of the file through sh.
#----cut here-----cut here-----cut here-----cut here----#
#!/bin/sh
# shar: Shell Archiver
# Run the following text with /bin/sh to create:
# dasm.uue
# This archive created: Mon Feb 8 13:07:10 1988
# By: Patrick White (PUCC Land, USA)
echo shar: extracting dasm.uue '(59443 characters)'
cat << \SHAR_EOF > dasm.uue
begin 644 dasm
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2``````/R```#ZP````$```/R
`
end
SHAR_EOF
if test 59443 -ne "`wc -c dasm.uue`"
then
echo shar: error transmitting dasm.uue '(should have been 59443 characters)'
fi
# End of shell archive
exit 0ain@j.cc.purdue.edu (Patrick White) (02/09/88)
Program Name: dasm (part 2 of 2)
Submitted By: dillon%cory.Berkeley.EDU@ucbvax.berkeley.edu (Matt Dillon)
Summary: A cross assembler for 6502, 68705, 6803, and HD6303 (extension
of 6803)
Poster Boy: Pat White (ain@j.cc.purdue.edu)
Tested.
NOTES:
-- Pat White (co-moderator comp.sources/binaries.amiga)
UUCP: j.cc.purdue.edu!ain BITNET: PATWHITE@PURCCVM PHONE: (317) 743-8421
U.S. Mail: 320 Brown St. apt. 406, West Lafayette, IN 47906
========================================
# This is a shell archive.
# Remove everything above and including the cut line.
# Then run the rest of the file through sh.
#----cut here-----cut here-----cut here-----cut here----#
#!/bin/sh
# shar: Shell Archiver
# Run the following text with /bin/sh to create:
# example.asm
# ftohex.uue
# This archive created: Mon Feb 8 13:11:57 1988
# By: Patrick White (PUCC Land, USA)
echo shar: extracting example.asm '(7052 characters)'
cat << \SHAR_EOF > example.asm
; EXAMPLE.ASM (6502 Microprocessor)
;
processor 6502
mac ldax
lda [{1}]
ldx [{1}]+1
endm
mac ldaxi
lda #<[{1}]
ldx #>[{1}]
endm
mac stax
sta [{1}]
stx [{1}]+1
endm
mac pushxy
txa
pha
tya
pha
endm
mac popxy
pla
tay
pla
tax
endm
mac inc16
inc {1}
bne .1
inc {1}+1
.1
endm
STOP1 equ %00000000 ;CxCTL 1 Stop bit
STOP2 equ %10000000 ;CxCTL 2 Stop bits (WL5:1.5, WL8&par:1)
WL5 equ %01100000 ;CxCTL Wordlength
WL6 equ %01000000
WL7 equ %00100000
WL8 equ %00000000
RCS equ %00010000 ;CxCTL 1=Select baud, 0=ext. receiver clk
B76800 equ %0000 ;CxCTL Baud rates (1.2288 Mhz clock)
B75 equ %0001
B100 equ %0010
B150 equ %0011
B200 equ %0100
B300 equ %0101
B400 equ %0110
B600 equ %0111
B800 equ %1000
B1200 equ %1001
B1600 equ %1010
B2400 equ %1011
B3200 equ %1100
B4800 equ %1101
B6400 equ %1110
B12800 equ %1111
PARODD equ %00100000 ;CxCMD Select Parity
PAREVEN equ %01100000
PARMARK equ %10100000
PARSPACE equ %11100000
PAROFF equ %00000000
RECECHO equ %00010000 ;CxCMD Receiver Echo mode
TMASK equ %00001100
TDISABLE equ %00000000 ;CxCMD Transmitter modes
TDISABLER equ %00001000 ;RTS stays asserted
TENABLE equ %00000100
TBREAK equ %00001100 ;send break
UA_IRQDSBL equ %00000010
DTRRDY equ %00000001 ;~DTR output is inverted (low)
SR_PE equ %00000001 ;CxSTAT Status
SR_FE equ %00000010 ;NOTE: writing dummy data causes RESET
SR_OVRUN equ %00000100
SR_RDRFULL equ %00001000
SR_TDREMPTY equ %00010000
SR_DCD equ %00100000
SR_DSR equ %01000000
SR_INTPEND equ %10000000
T1_OEPB7 equ %10000000 ;x_ACR
T1_FREERUN equ %01000000 ;T1 free running mode
T1_ONESHOT equ %00000000
T2_ICPB6 equ %00100000 ;T2 counts pulses on PB6
T2_ONESHOT equ %00000000 ;T2 counts phase2 transitions
SRC_OFF equ %00000000 ;shift register control
SRC_INT2 equ %00000100
SRC_INPH2 equ %00001000
SRC_INEXT equ %00001100
SRC_OUTFR equ %00010000 ;free running output using T2
SRC_OUTT2 equ %00010100
SRC_OUTPH2 equ %00011000
SRC_OUTEXT equ %00011100
PBLE equ %00000010 ;on CB1 transition (in/out).
PALE equ %00000001 ;on CA1 transition (in). data retained
;x_PCR
CB2_I_NEG equ %00000000 ;interrupt on neg trans, r/w ORB clears
CB2_I_NEGI equ %00100000 ; same, but r/w ORB does not clear int
CB2_I_POS equ %01000000 ;interrupt on pos trans, r/w ORB clears
CB2_I_POSI equ %01100000 ; same, but r/w ORB does not clear int
CB2_O_HSHAK equ %10000000 ;CB2=0 on r/w ORB, CB2=1 on CB1 transition
CB2_O_PULSE equ %10100000 ;CB2=0 for one clock after r/w ORB
CB2_O_MANLO equ %11000000 ;CB2=0
CB2_O_MANHI equ %11100000 ;CB2=1
CA2_I_NEG equ %00000000 ;interrupt on neg trans, r/w ORA clears
CA2_I_NEGI equ %00100000 ; same, but r/w ORA does not clear int
CA2_I_POS equ %01000000 ;interrupt on pos trans, r/w ORA clears
CA2_I_POSI equ %01100000 ; same, but r/w ORA does not clear int
CA2_O_HSHAK equ %10000000 ;CA2=0 on r/w ORA, CA2=1 on CA1 transition
CA2_O_PULSE equ %10100000 ;CA2=0 for one clock after r/w ORA
CA2_O_MANLO equ %11000000 ;CA2=0
CA2_O_MANHI equ %11100000 ;CA2=1
CB1_THI equ %00010000
CB1_TLO equ %00000000
CA1_THI equ %00000001
CA1_TLO equ %00000000
VIRPEND equ %10000000 ;x_IFR
IRENABLE equ %10000000 ;x_IER 1's enable ints 0=no change
IRDISABLE equ %00000000 ;x_IER 1's disable ints 0=no change
IRT1 equ %01000000
IRT2 equ %00100000
IRCB1 equ %00010000
IRCB2 equ %00001000
IRSR equ %00000100
IRCA1 equ %00000010
IRCA2 equ %00000001
seg.u bss
org $0000 ;RAM (see below)
org $2000 ;unused
org $4000 ;unused
org $6000 ;6551 CHANNEL #1
C1DATA ds 1
C1STAT ds 1
C1CMD ds 1
C1CTL ds 1
org $8000 ;6551 CHANNEL #2
C2DATA ds 1
C2STAT ds 1
C2CMD ds 1
C2CTL ds 1
org $A000 ;6522 (HOST COMM)
H_ORB ds 1
H_ORAHS ds 1 ;with CA2 handshake
H_DDRB ds 1
H_DDRA ds 1
H_T1CL ds 1 ;read clears interrupt flag
H_T1CH ds 1 ;write clears interrupt flag
H_T1CLL ds 1
H_T1CHL ds 1 ;write clears interrupt flag
H_T2CL ds 1 ;read clears interrupt flag
H_T2CH ds 1 ;write clears interrupt flag
H_SR ds 1
H_ACR ds 1
H_PCR ds 1
H_IFR ds 1
H_IER ds 1
H_ORA ds 1 ;no CA2 handshake
org $C000 ;6522 (IO COMM)
I_ORB ds 1
I_ORAHS ds 1 ; (same comments apply)
I_DDRB ds 1
I_DDRA ds 1
I_T1CL ds 1
I_T1CH ds 1
I_T1CLL ds 1
I_T1CHL ds 1
I_T2CL ds 1
I_T2CH ds 1
I_SR ds 1
I_ACR ds 1
I_PCR ds 1
I_IFR ds 1
I_IER ds 1
I_ORA ds 1
; -------------------------- ZERO PAGE -------------------
seg.u data
org $00
; -------------------------- NORMAL RAM -------------------
org $0100
RAMEND equ $2000
; -------------------------- CODE -------------------
seg code
org $F000
PROMBEG equ .
RESET subroutine
sei ;disable interrupts
ldx #$FF ;reset stack
txs
lda #$FF
sta H_DDRA
sta C1STAT ;reset 6551#1 (garbage data)
sta C2STAT ;reset 6551#2
lda #$7F ;disable all 6522 interrupts
sta H_IER
sta I_IER
lda #%00010000 ;76.8 baud, 8 bits, 1 stop
sta C1CTL
lda #%00000101 ;no parity, enable transmitter & int
sta C1CMD
lda #$AA ;begin transmision
sta C1DATA
lda #%00011111 ;9600 baud, 8 bits, 1 stop
sta C2CTL
lda #%00000101
sta C2CMD
lda #$41
sta C2DATA
cli ;enable interrupts
.1 jsr LOAD
jsr SAVE
jmp .1
LOAD subroutine
ldx #0
.1 txa
sta $0500,x
inx
bne .1
rts
SAVE subroutine
ldx #0
.2 lda $0500,x
sta H_ORA
inx
bne .2
rts
NMI rti
subroutine
IRQ bit C1STAT
bpl .1
pha
lda #$AA
sta C1DATA
lda C1DATA
pla
rti
.1 bit C2STAT
bpl .2
pha
lda #$41
sta C2DATA
lda C2DATA
pla
.2 rti
; VECTOR ------------------------------------------------
seg vector
org $FFFA
dc.w NMI
dc.w RESET
dc.w IRQ
PROMEND equ .
SHAR_EOF
if test 7052 -ne "`wc -c example.asm`"
then
echo shar: error transmitting example.asm '(should have been 7052 characters)'
fi
echo shar: extracting ftohex.uue '(11011 characters)'
cat << \SHAR_EOF > ftohex.uue
begin 644 ftohex
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end
SHAR_EOF
if test 11011 -ne "`wc -c ftohex.uue`"
then
echo shar: error transmitting ftohex.uue '(should have been 11011 characters)'
fi
# End of shell archive
exit 0