NED@YMIR.BITNET (Ned Freed) (08/06/87)
==Instruction set help file part 1==cut here==cut here==cut here==cut here==
.!INSTR.RNO - Concise description of the VAX instruction set
.!
.! RUNOFF operation instructions:
.! This file can either produce a printed document or an entry
.! for VMS online HELP. Use the command
.!
.! $ RUNOFF/NOBOLD/NOUNDER/OUT=INSTR.HLP INSTR.RNO
.!
.! to create the online help entry. INSTR.HLP can be inserted
.! into any VMS help library. Use the command
.!
.! $ RUNOFF/OUT=INSTR.MEM/VAR=MANUAL INSTR.RNO
.!
.! To create a document for printing.
.!
.if manual
.!
.! We set the layout so that running page numbers are on the bottom
.!
.lo 1,2
.st
.!
.! Initial right margin - sections should never set it higher than this.
.! Set page size too.
.ps 60,70 .rm 70
.!
.! Header level setup
.sthl 6,0,0,8,9,1,1,9,2
.dhl D,D,lu,d,ll,ll
.!
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.c;
.sk 2
.c;THE VAX INSTRUCTION SET
.title VAX INSTRUCTION SET
.sk 2
.c;Ned Freed, 18-Jan-1985
.c;MATHLIB Project
.c;Harvey Mudd College
.sk 3
.else manual
.NO NUMBER .NO PAGING .STHL 5,1,1
.endif manual
.!
.ifnot manual
1 Instruction
.br
This help file describes the formats and types of available
VAX-11 machine instructions. To use this help facility, just
specify the specific instruction to be described as a subtopic.
.s 1
These descriptions are adapted from the VAX-11 Architecture
Handbook, with the addition of some extra tables. All instruction timing
measurements were done either by Oregon Software or by Digital.
.else manual
.save
.flags bold
.hl 1 ^*Overview\*
.restore
This document describes the instruction set of the VAX-11 computer.
These descriptions are useful both to the assembly language programmer
and to the high-level language programmer who wishes to examine the
machine code produced for his or her program. All the VAX/VMS compilers will
optionally list the generated machine instructions.
.s 1
These descriptions are adapted from the ^&VAX-11 Architecture
Handbook\&. This document is more concise and is better organized
(alphabetically by instruction) than the original handbook. In
addition some new tables are included.
.endif manual
.s 1
At the present time the instructions EDITPC, INSQHI [780-12.80],
.index ^Instructions, machine><EDITPC
INSQTI [780-14.00, 750-15.07, 730-26.89]
.index ^Instructions, machine><INSQTI
.index ^Instructions, machine><INSQHI
.index ^Instructions, machine><REMQTI
.index ^Instructions, machine><REMQHI
[780F-14.00, 750F-15.07, 730F-27.51],
REMQHI [780-11.60] and REMQTI [780-13.00] are not included.
.if manual
.save
.flags bold
.hl 1 ^*Instruction timing measurements\*
.restore
.else manual
.br
2 Timing
.br
.endif manual
.if manual
One key piece of information not provided by Digital for their
various VAX processors is timing
measurements for all instructions. Such measurements are very
useful when estimating code execution time or attempting to build
a new code generator. Fortunately such
.else manual
Timing
.endif manual
measurements have been done for various VAX processors by both
Oregon Software and Digital (inhouse).
These execution times are included for many of the instructions
described. They are enclosed in square brackets (for example, [780-1.80])
next to the opcode they apply to. The first number indicates the VAX processor
type for the time, while the second number is the actual time expressed in
microseconds. A "F" after the processor number indicates the presence of
the FPA option (floating point accelerator).
.s 1
All instruction time are base times, i.e. the
operands to the instruction may add additional execution time.
The amount of time a given operand adds to an instruction is
listed separately. For example, a "MOVL (Rn)+,@(RN)+" on a#780 would
take#0.40 for the MOVL,#0.40 for the (Rn)+ and#1.00 for the
@(Rn)+, for a total of#1.80 microseconds.
.s 1
Special conditions for timing and additional timing measurements
will sometimes be listed in the notes section for an instruction.
.s 1
All the timings are approximate and should only be used to obtain
a rough approximation of execution time. The operation of processor
cache and pipelining will cause actual times to vary from the
measured ones.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*Timing for operands\*
.restore
.send toc .endif global
.else manual
.br
2 Operand__timing
.br
.endif manual
Operand timing was done based primarily
on the MOVL and ADDL instructions. While
this may not be precise when applied to other instructions, it has
proven to be fairly accurate. Note however that these times are only
approximate -- an operand's speed may vary depending on the instruction and
the position of the operand in the instruction.
.s 1 .test page 11
Source mode times for a 780 with or without FPA:
.nf .rm 74 .s 1 .index ^Instructions, machine>^Operand>^Source mode
S_^_#literal . . .[0.00] (Rn) . . . . . .[0.40] -(Rn) . . . . .[0.40]
(Rn)+ . . . . .[0.40] @(Rn)+ . . . . .[1.00] B_^D(Rn) . . . .[0.40]
W_^D(Rn) . . . .[0.40] L_^D(Rn) . . . .[0.80] @B_^D(Rn) . . . .[1.00]
@W_^D(Rn) . . . .[1.00] @L_^D(Rn) . . . .[1.40] _#literal . . . .[0.80]
@_#address . . .[0.80] (Rn)[Rn] . . . .[1.00] -(Rn)[Rn] . . .[1.00]
(Rn)+[Rn] . . .[1.00] @(Rn)+[Rn] . . .[1.40] B_^D(Rn)[Rn] . .[1.00]
W_^D(Rn)[Rn] . .[1.00] L_^D(Rn)[Rn] . .[0.80] @B_^D(Rn)[Rn] . .[1.40]
@W_^D(Rn)[Rn] . .[1.40] @L_^D(Rn)[Rn] . .[1.40] @_#address[Rn] .[1.00]
.s 1 .test page 11
Destination mode times for a 780 with or without FPA:
.s 1 .index ^Instructions, machine>^Operand>^Destination mode
(Rn) . . . . . .[0.40] -(Rn) . . . . .[0.40] (Rn)+ . . . . .[0.60]
@(Rn)+ . . . . .[1.00] B_^D(Rn) . . . .[0.40] W_^D(Rn) . . . .[0.60]
L_^D(Rn) . . . .[0.60] @B_^D(Rn) . . . .[1.00] @W_^D(Rn) . . . .[1.20]
@L_^D(Rn) . . . .[1.20] @_#address . . .[0.60] (Rn)[Rn] . . . .[1.00]
-(Rn)[Rn] . . .[1.00] (Rn)+[Rn] . . .[1.00] @(Rn)+[Rn] . . .[1.40]
B_^D(Rn)[Rn] . .[1.00] W_^D(Rn)[Rn] . .[1.00] L_^D(Rn)[Rn] . .[0.60]
@B_^D(Rn)[Rn] . .[1.40] @W_^D(Rn)[Rn] . .[1.40] @L_^D(Rn)[Rn] . .[1.40]
@_#address[Rn] .[1.00]
.s 1 .test page 6
Source mode times for a 750 with or without FPA:
.s 1 .index ^Instructions, machine>^Operand>^Source mode
(Rn) . . . . . .[0.20] B_^D(Rn) . . . .[0.40] B_^W(Rn) . . . .[0.70]
(RN)[Rn] . . . .[0.90]
.s 1 .test page 6
Destination mode times for a 750 with or without FPA:
.s 1 .index ^Instructions, machine>^Operand>^Destination mode
(Rn) . . . . . .[0.70]
.s 1 .test page 6
Source mode times for a 730 with or without FPA:
.s 1 .index ^Instructions, machine>^Operand>^Source mode
(Rn) . . . . . .[0.70] B_^D(Rn) . . . .[1.20] B_^W(Rn) . . . .[3.00]
(RN)[Rn] . . . .[2.63]
.s 1 .test page 6
Destination mode times for a 730 with or without FPA:
.s 1 .index ^Instructions, machine>^Operand>^Destination mode
(Rn) . . . . . .[1.70]
.if manual
.test page 10 .send toc .ifnot global
.save
.flags bold
.hl 1 ^*ACB instructions\*
.restore
.send toc .endif global
.index ^Instructions, machine><ACB
.else manual
2 ACB
.endif manual
.nf
Purpose: add compare and branch - maintain loop count
and loop
.if manual
.s 1
.endif manual
Format: opcode limit.rx,add.rx,index.rx,displ.bw
.if manual
.s 1
.endif manual
Operation: index = index + add; if {{add GEQ 0} AND {index LEQ
limit}} OR {{add LSS 0} AND {index GEQ limit}} then
PC = PC + SEXT (displ)
.if manual
.s 1
.endif manual
C. Codes: N = {index LSS 0}, Z = {index EQL 0}, C = C,
V = {integer or floating overflow}
.if manual
.s 1
.endif manual
Exceptions: Integer or floating overflow, floating
underflow, reserved operand
.if manual
.s 1
.endif manual
Opcodes: 9D ACBB Add compare and branch byte [780-3.00]
3D ACBW Add compare and branch word [780-3.00]
F1 ACBL Add compare and branch long [780-3.00]
4F ACBF Add compare and branch F__floating
6F ACBD Add compare and branch D__floating
4FFD ACBG Add compare and branch G__floating
6FFD ACBH Add compare and branch H__floating
.if manual
.s 1
.endif manual
Description: add is added to index and index is replaced by the
result. index is compared with limit. If add is
greater than or equal to zero and the comparison is
less than or equal to zero or if add is less than
zero and the comparison is greater than or equal,
the branch is taken. The condition codes are
unpredictable on a reserved operand fault.
.if manual
.s 1
.endif manual
Notes: The times listed for the integer instructions assume
a positive displacement and the branch is taken. For
other integer cases (all lengths are the same):
Pos. dis. branch not taken = [780-2.60]
Neg. dis. branch taken = [780-2.80]
Neg. dis. branch not taken = [780-2.40]
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*ADAWI instruction\*
.restore
.send toc .endif global
.index ^Instructions, machine><ADAWI
.else manual
2 ADAWI
.endif manual
.nf
Purpose: add aligned word interlocked - maintain operating
system resource usage counts
.if manual
.s 1
.endif manual
Format: opcode add.rw,sum.mw
.if manual
.s 1
.endif manual
Operation: tmp = add; {set interlock}; sum = sum + tmp;
{release interlock}
.if manual
.s 1
.endif manual
C. Codes: N = {sum LSS 0}, Z = {sum EQL 0},
V = {integer overflow}, C = {carry from MSB}
.if manual
.s 1
.endif manual
Exceptions: Reserved operand fault, integer overflow
.if manual
.s 1
.endif manual
Opcode: 58 ADAWI Add aligned word interlocked [780-3.20]
.if manual
.s 1
.endif manual
Description: The add operand is added to sum and sum is replaced
by the result. The operation is interlocked against
ADAWI operations by other processors or devices in
the system. The destination must be aligned on a
word boundary, i.e. bit zero of sum's address must
be zero. A reserved operand fault is taken if it
is not.
.if manual
.s 1
.endif manual
Notes: Integer overflow occurs if the input operands have the
same sign and the result has the opposite sign. On
overflow, sum is replaced by the low order bits of the
true result. If add and sum overlap, the result and
condition codes are unpredictable.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*ADDxx instructions\*
.restore
.send toc .endif global
.else manual
2 ADDxx
.endif manual
.nf
Purpose: perform arithmetic addition
.if manual
.s 1
.endif manual
Format: opcode add.rx,sum.mx ;2 operand
opcode add1.rx,add2.rx,sum.wx ;3 operand
.if manual
.s 1
.endif manual
Operation: sum = sum + add ;2 operand
sum = add1 + add2 ;3 operand
.if manual
.s 1
.endif manual
C. Codes: N = {sum LSS 0}, Z = {sum EQL 0}, V = {overflow},
C = 0 (floating), C = {carry from MSB} (integer)
.if manual
.s 1
.endif manual
Exceptions: Integer or floating overflow, floating
underflow, reserved operand
.if manual
.s 1
.endif manual
Opcodes: 80 ADDB2 Add byte 2 operand
.index ^Instructions, machine><ADDB2
[780-0.40, 750-0.94, 730-2.88]
[780F-0.40, 750F-0.94, 730F-2.83]
81 ADDB3 Add byte 3 operand [780-0.60]
.index ^Instructions, machine><ADDB3
A0 ADDW2 Add word 2 operand
.index ^Instructions, machine><ADDW2
[780-0.40, 750-0.93, 730-2.69]
[780F-0.40, 750F-0.93, 730-2.65]
A1 ADDW3 Add word 3 operand [780-0.60]
.index ^Instructions, machine><ADDW3
C0 ADDL2 Add long 2 operand
.index ^Instructions, machine><ADDL2
[780-0.40, 750-0.93, 730-2.53]
[780F-0.40, 750F-0.93, 730F-2.49]
C1 ADDL3 Add long 3 operand
.index ^Instructions, machine><ADDL3
[780-0.60, 750-1.29, 730-2.88]
[780F-0.60, 750F-1.29, 730F-2.83]
40 ADDF2 Add F__floating 2 operand
.index ^Instructions, machine><ADDF2
[780-2.21, 750-8.76, 730-39.95]
[780F-0.80, 750F-1.32, 730F-6.39]
41 ADDF3 Add F__floating 3 operand
.index ^Instructions, machine><ADDF3
60 ADDD2 Add D__floating 2 operand
.index ^Instructions, machine><ADDD2
[780-9.44, 750-14.41, 730-61.85]
[780F-1.40, 750F-2.51, 730F-12.85]
61 ADDD3 Add D__floating 3 operand
.index ^Instructions, machine><ADDD3
40FD ADDG2 Add G__floating 2 operand
.index ^Instructions, machine><ADDG2
[780-14.46, 750-24.65, 730-64.41]
[780F-14.47, 750F-24.65, 730F-16.40]
41FD ADDG3 Add G__floating 3 operand
.index ^Instructions, machine><ADDG3
60FD ADDH2 Add H__floating 2 operand
.index ^Instructions, machine><ADDH2
[780-27.53, 750-38.39, 730-98.60]
[780F-27.54, 750F-38.39, 730F-23.81]
61FD ADDH3 Add H__floating 3 operand
.index ^Instructions, machine><ADDH3
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*ADDPx instructions\*
.restore
.send toc .endif global
.else manual
2 ADDPx
.endif manual
.nf
Purpose: add one packed decimal string to another
.if manual
.s 1
.endif manual
Format: opcode addlen.rw,addaddr.ab,
sumlen.rw, sumaddr.ab ;4 operand
opcode add1len.rw,add1addr.ab,add2len.rw,
add2addr.ab,sumlen.rw,sumaddr.ab ;6 operand
.if manual
.s 1
.endif manual
Operation: {sum string} = {sum string} +
{add string} ;4 operand
{sum string} = {add1 string} +
{add2 string} ;6 operand
.if manual
.s 1
.endif manual
C. Codes: N = {{sum string} LSS 0}, Z = {{sum string} EQL 0},
V = {decimal overflow}, C = 0
.if manual
.s 1
.endif manual
Exceptions: Reserved operand, decimal overflow
.if manual
.s 1
.endif manual
Opcodes: 80 ADDP4 Add packed 4 operand
.index ^Instructions, machine><ADDP4
[780-14.89, 750-27.02, 730-84.96]
[780F-14.89, 750F-27.02, 730F-86.95]
81 ADDP6 Add packed 6 operand
.index ^Instructions, machine><ADDP6
[780-18.10, 750-30.78, 730-92.94]
[780F-18.10, 750F-30.78, 730F-91.89]
.if manual
.s 1
.endif manual
Description: In 4 operand format, the addend string as specified
by addlen and addaddr is added to the sum string
specified by sumlen and sumaddr, and sum is replaced
by the result. In 6 operand format, the addend 1
string specified by add1len and add1addr is added to
the addend 2 string specified by add2len and
add2addr, and the sum string is replaced by the
result.
.if manual
.s 1
.endif manual
Notes: After ADDP4, R0 = 0, R1 = address of the most
significant digit of the addend, R2 = 0, R3 =
address of the most significant digit of the sum.
After ADDP6, R0 = 0, R1 = address of MSD of addend1,
R2 = 0, R3 = address of the MSD of addend2, R4 = 0,
R5 = address of the MSD of sum. The times shown are
for 7 digit operands, the times for 18 digit
operands are:
ADDP4 - [780-35.39, 750-57.25, 730-152.20]
[780F-35.39, 750F-57.25, 730F-149.42]
ADDP6 - [780-40.27, 750-60.97, 730-160.50]
[780F-40.25, 750F-60.97, 730F-158.27]
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*ADWC instruction\*
.restore
.send toc .endif global
.index ^Instructions, machine><ADWC
.else manual
2 ADWC
.endif manual
.nf
Purpose: add with carry - perform extended-precision addition
.if manual
.s 1
.endif manual
Format: opcode add.rl,sum.ml
.if manual
.s 1
.endif manual
Operation: sum = sum + add + C
.if manual
.s 1
.endif manual
C. Codes: N = {sum LSS 0}, Z = {sum EQL 0},
V = {integer overflow}, C = {carry from MSB}
.if manual
.s 1
.endif manual
Exceptions: Integer overflow
.if manual
.s 1
.endif manual
Opcode: D8 ADWC Add with carry [780-0.40]
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*AOBLxx instructions\*
.restore
.send toc .endif global
.else manual
2 AOBLxx
.endif manual
.nf
Purpose: add one and branch - increment integer loop count
and loop
.if manual
.s 1
.endif manual
Format: opcode limit.rl,index.ml,displ.bb
.if manual
.s 1
.endif manual
Operation: index = index + 1; if {{AOBLSS} and {index LSS
limit}} or {{AOBLEQ} and {index LEQ limit}} then
PC = PC + SEXT (displ)
.if manual
.s 1
.endif manual
C. Codes: N = {index LSS 0}, Z = {index EQL 0},
V = {integer overflow}, C = C
.if manual
.s 1
.endif manual
Exceptions: Integer overflow
.if manual
.s 1
.endif manual
Opcodes: F2 AOBLSS Add one, branch less than [780-1.40]
.index ^Instructions, machine><AOBLSS
F3 AOBLEQ Add one, branch less or equal
.index ^Instructions, machine><AOBLEQ
[780-1.40]
.if manual
.s 1
.endif manual
Notes: The instruction times shown assume the branch is
taken. If the branch is not taken the time for both
AOB instructions is [780-1.00].
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*ASHx instructions\*
.restore
.send toc .endif global
.else manual
2 ASHx
.endif manual
.nf
Purpose: shift of integer
.if manual
.s 1
.endif manual
Format: opcode cnt.rb,src.rx,dst.wx
.if manual
.s 1
.endif manual
Operation: dst = src shifted cnt bits
.if manual
.s 1
.endif manual
C. Codes: N = {dst LSS 0}, Z = {dst EQL 0},
V = {integer overflow}, C = 0
.if manual
.s 1
.endif manual
Exceptions: Integer overflow
.if manual
.s 1
.endif manual
Opcodes: 78 ASHL Arithmetic shift long
.index ^Instructions, machine><ASHL
[780-2.00, 750-4.03, 730-11.49]
[780F-2.00, 750F-4.03, 730F-11.33]
79 ASHQ Arithmetic shift quad [780-3.40]
.index ^Instructions, machine><ASHQ
.if manual
.s 1
.endif manual
Description: src is arithmetically shifted by the number of bits
specified by cnt and the result is placed in dst.
Positive cnt shifts left bringing 0's into the LSB.
Negative cnt shifts right bringing copies of the MSB
into the MSB. Zero cnt copies dst to src unaffected.
.if manual
.s 1
.endif manual
Notes: Integer overflow occurs on a left shift if the final
MSB of dst differs from src. On overflow dst
receives the low order bits of the correct result.
Times listed are for a shift of 10. Tests on 780's
show that shifts of 1 or 31 take the same time as
a shift of 10. Times for a shift of -31 are ASHL
[780-1.80] and ASHQ [780-3.00]. No other shift
distances were timed.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*ASHP instruction\*
.restore
.send toc .endif global
.index ^Instructions, machine><ASHP
.else manual
2 ASHP
.endif manual
.nf
Purpose: arithmetic shift and round packed - scale numeric
content of a packed decimal string by a power of ten
.if manual
.s 1
.endif manual
Format: opcode cnt.rb,srclen.rw,srcaddr.ab,round.rb,
dstlen.rw,dstaddr.ab
.if manual
.s 1
.endif manual
Operation: {dst string} = {{src string} + {round _<3:0_>*
(10**(-cnt-1))}} * (10**cnt);
.if manual
.s 1
.endif manual
C. Codes: N = {{dst string} LSS 0}, Z = {{dst string} EQL 0},
V = {decimal overflow}, C = 0
.if manual
.s 1
.endif manual
Exceptions: Reserved operand, decimal overflow
.if manual
.s 1
.endif manual
Opcodes: F8 ASHP Arithmetic shift packed
.if manual
.s 1
.endif manual
Description: src as specified by srclen and srcaddr is scaled by
a power of 10 specified by cnt. dst is replaced by
the result. A positive cnt effectively multiplies,
a negative cnt effectively divides and a zero cnt
just moves src to dst while affecting the condition
codes. If cnt is negative the result is rounded
using round.
.if manual
.s 1
.endif manual
Notes: After execution R0 = 0, R1 = address of the byte of
the most significant digit of src, R2 = 0, R3 =
address of the most significant digit of dst. All
condition codes and R0-R3 are unpredictable if src
overlaps dst, src contains an invalid nibble, or a
reserved operand exception occurs. When cnt is
negative the result is rounded by adding bits 3:0 of
round to the most significant low order digit
discarded and propogating any carry through to
higher order digits of dst. If bits 7:4 of round are
nonzero or if 3:0 contain an illegal packed decimal
digit the result is unpredictable. round should
normally be 5, or 0 if truncation is desired.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*Bxxx instructions\*
.restore
.send toc .endif global
.else manual
2 Bxxx
.endif manual
.nf
Purpose: branch - test condition code(s)
.if manual
.s 1
.endif manual
Format: opcode displ.bb
.if manual
.s 1
.endif manual
Operation: if {condition} then PC = {PC + SEXT (displ)}
.if manual
.s 1
.endif manual
C. Codes: Not affected
.if manual
.s 1
.endif manual
Exceptions: None
.if manual
.s 1
.endif manual
Opcodes: 12 {Z EQL 0} BNEQ Branch not equal (s)
.index ^Instructions, machine><BNEQ
BNEQU Branch not equal (u)
.index ^Instructions, machine><BNEQU
13 {Z EQL 1} BEQL Branch equal (s)
.index ^Instructions, machine><BEQL
BEQLU Branch equal (u)
.index ^Instructions, machine><BEQLU
14 {(N OR Z) EQL 0} BGTR Branch greater than (s)
.index ^Instructions, machine><BGTR
15 {(N OR Z) EQL 1} BLEQ Branch less or equal (s)
.index ^Instructions, machine><BLEQ
18 {N EQL 0} BGEQ Branch greater, equal (s)
.index ^Instructions, machine><BGEQ
19 {N EQL 1} BLSS Branch less than (s)
.index ^Instructions, machine><BLSS
1A {(C OR Z) EQL 0} BGTRU Branch greater than (u)
.index ^Instructions, machine><BGTRU
1B {(C OR Z) EQL 1} BLEQU Branch less or equal (u)
.index ^Instructions, machine><BLEQU
1C {V EQL 0} BVC Branch overflow clear
.index ^Instructions, machine><BVX
1D {V EQL 1} BVS Branch overflow set
.index ^Instructions, machine><BVS
1E {C EQL 0} BGEQU Branch greater, equal (u)
.index ^Instructions, machine><BGEQU
BCC Branch carry clear
.index ^Instructions, machine><BCC
1F {C EQL 1} BLSSU Branch less than (u)
.index ^Instructions, machine><BLSSU
BCS Branch carry set
.index ^Instructions, machine><BCS
legend: s - signed, u - unsigned
.if manual
.s 1
.endif manual
Description: The condition codes are tested and if the condition
indicated by the instruction is met, the sign
extended branch displacement is added to the PC. The
times are [780-0.60] if the branch is taken and
[780-0.40] if it is not for all the instructions.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BBx instructions\*
.restore
.send toc .endif global
.else manual
2 BBx
.endif manual
.nf
Purpose: branch on bit - test selected bit
.if manual
.s 1
.endif manual
Format: opcode pos.rl,base.ab,displ.bb
.if manual
.s 1
.test page 3
.endif manual
Operation: teststate = {if {BBS} then 1 else 0}; if {FIELD
(pos, 1, base) EQL teststate} then PC = {PC +
SEXT (displ)}
.if manual
.s 1
.endif manual
C. Codes: Unaffected
.if manual
.s 1
.endif manual
Exceptions: Reserved operand
.if manual
.s 1
.endif manual
Opcodes: E0 BBS Branch on bit set
.index ^Instructions, machine><BBS
[780-1.40, 750-2.32, 730-5.17]
[780F-1.41, 750F-2.32, 730F-5.10]
E1 BBC Branch on bit clear
.index ^Instructions, machine><BBC
.if manual
.s 1
.endif manual
Description: The single bit field specified by pos and base is
tested. If it is in the test state indicated by the
instruction, the sign extended branch displacement
is added to PC and the result is placed in PC.
.if manual
.s 1
.endif manual
Notes: A reserved operand fault occurs if pos GTRU 31 and
the bit is contained in a register. The times shown
above are valid if the branch is not taken.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BBxx instructions\*
.restore
.send toc .endif global
.else manual
2 BBxx
.endif manual
.nf
Purpose: branch on bit - test and modify selected bit
.if manual
.s 1
.endif manual
Format: opcode pos.rl,base.ab,displ.bb
.if manual
.s 1
.endif manual
Operation: teststate = if {BBSS or BBSC} then 1 else 0;
newstate = if {BBSS or BBCS} then 1 else 0; temp =
FIELD (pos, 1, base); FIELD (pos, 1, base) =
newstate; if temp EQL teststate then PC = {PC +
SEXT (displ)}
.if manual
.s 1
.endif manual
C. Codes: Unaffected
.if manual
.s 1
.endif manual
Exceptions: Reserved operand
.if manual
.s 1
.endif manual
Opcodes: E2 BBSS Branch on bit set and set
.index ^Instructions, machine><BBSS
E3 BBCS Branch on bit clear and set
.index ^Instructions, machine><BBCS
E4 BBSC Branch on bit set and clear
.index ^Instructions, machine><BBSC
E5 BBCC Branch on bit clear and clear
.index ^Instructions, machine><BBCC
[780-1.60, 750-2.90, 730-6.61]
[780F-1.60, 750F-2.90, 730F-6.53]
.if manual
.s 1
.endif manual
Description: The single bit field specified by pos and base is
tested. If it is in the test state indicated by the
instruction, the sign extended branch displacement
is added to PC and placed in PC. Regardless of
whether the branch is taken or not, the tested bit
is put in the new state as indicated by the
instruction.
.if manual
.s 1
.endif manual
Notes: A reserved operand fault occurs if pos GTRU 31 and
the bit is contained in a register. The times shown
above are valid if the branch is not taken.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BBxxI instructions\*
.restore
.send toc .endif global
.else manual
2 BBxxI
.endif manual
.nf
Purpose: branch on bit interlocked - test and modify selected
bit under memory interlock.
.if manual
.s 1
.endif manual
Format: opcode pos.rl,base.ab,displ.bb
.if manual
.s 1
.endif manual
Operation: teststate = if {BBSSI} then 1 else 0; newstate =
teststate; {set interlock}; temp = FIELD (pos,
1, base); FIELD (pos, 1, base) = newstate; {release
interlock}; if temp EQL teststate then PC =
{PC + SEXT(displ)}
.if manual
.s 1
.endif manual
C. Codes: Not affected
.if manual
.s 1
.endif manual
Exceptions: Reserved operand
.if manual
.s 1
.endif manual
Opcodes: E6 BBSSI Branch bit set, set interlocked
.index ^Instructions, machine><BBSSI
E7 BBCCI Branch bit clear, clear interlocked
.index ^Instructions, machine><BBCCI
[780-1.60, 750-2.90, 730-6.88]
[780F-1.60, 750F-2.90, 730F-6.79]
.if manual
.s 1
.endif manual
Description: The single bit field specified by pos and base is
tested. If it is in the state indicated by the
instruction, the sign extended branch displacement
displ is added to PC. The bit is set to the state
indicated by the instruction. The operation is
interlocked against other processors or devices in
the system. The times indicated reflect the branch
not being taken.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BICxx instructions\*
.restore
.send toc .endif global
.else manual
2 BICxx
.endif manual
.nf
Purpose: bit clear - perform complemented AND of two integers
.if manual
.s 1
.endif manual
Format: opcode mask.rx,dst.mx ;2 operand
opcode mask.rx,src.rx,dst.rx ;3 operand
.if manual
.s 1
.endif manual
Operation: dst = dst AND {NOT mask} ;2 operand
dst = src AND {NOT mask} ;3 operand
.if manual
.s 1
.endif manual
C. Codes: N = {dst LSS 0}, Z = {dst EQL 0}, V = 0, C = C
.if manual
.s 1
.endif manual
Exceptions: None
.if manual
.s 1
.endif manual
Opcodes: 8A BICB2 Bit clear byte, 2 operand [780-0.40]
.index ^Instructions, machine><BICB2
8B BICB3 Bit clear byte, 3 operand [780-0.60]
.index ^Instructions, machine><BICB3
AA BICW2 Bit clear word, 2 operand [780-0.40]
.index ^Instructions, machine><BICW2
AB BICW3 Bit clear word, 3 operand [780-0.60]
.index ^Instructions, machine><BICW3
CA BICL2 Bit clear long, 2 operand [780-0.40]
.index ^Instructions, machine><BICL2
CB BICL3 Bit clear long, 3 operand [780-0.60]
.index ^Instructions, machine><BICL3
.if manual
.s 1
.endif manual
Description: In 2 operand format, dst is ANDed with the ones
complement of mask and dst is replaced by the result.
In 3 operand format, src is ANDed with the ones
complement of mask and dst is replaced by the result.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BICPSW instruction\*
.restore
.send toc .endif global
.index ^Instructions, machine><BICPSW
.else manual
2 BICPSW
.endif manual
.nf
Purpose: bit clear PSW - clear trap enables
.if manual
.s 1
.endif manual
Format: opcode mask.rw
.if manual
.s 1
.endif manual
Operation: PSW = {PSW AND {NOT mask}}
.if manual
.s 1
.endif manual
C. Codes: N = N AND {NOT mask_<3_>}; Z = Z AND {NOT mask_<2_>}
V = V AND {NOT mask_<1_>}; C = C AND {NOT mask_<0_>}
.if manual
.s 1
.endif manual
Exceptions: Reserved operand
.if manual
.s 1
.endif manual
Opcode: B8 BICPSW Bit clear PSW [780-1.00]
.if manual
.s 1
.endif manual
Description: The PSW is ANDed with the complement of mask and PSW
is replaced by the result.
.if manual
.s 1
.endif manual
Notes: A reserved operand fault occurs if mask_<15:8_> is
not zero.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BISxx instructions\*
.restore
.send toc .endif global
.else manual
2 BISxx
.endif manual
.nf
Purpose: bit set - perform logical inclusive OR of two
integers
.if manual
.s 1
.endif manual
Format: opcode mask.rx,dst.mx ;2 operand
opcode mask.rx,src.rx,dst.rx ;3 operand
.if manual
.s 1
.endif manual
Operation: dst = dst OR mask ;2 operand
dst = src OR mask ;3 operand
.if manual
.s 1
.endif manual
C. Codes: N = {dst LSS 0}, Z = {dst EQL 0}, V = 0, C = C
.if manual
.s 1
.endif manual
Exceptions: None
.if manual
.s 1
.endif manual
Opcodes: 88 BISB2 Bit set byte, 2 operand [780-0.40]
.index ^Instructions, machine><BISB2
89 BISB3 Bit set byte, 3 operand [780-0.60]
.index ^Instructions, machine><BISB3
A8 BISW2 Bit set word, 2 operand [780-0.40]
.index ^Instructions, machine><BISW2
A9 BISW3 Bit set word, 3 operand [780-0.60]
.index ^Instructions, machine><BISW3
C8 BISL2 Bit set long, 2 operand [780-0.40]
.index ^Instructions, machine><BISL2
C9 BISL3 Bit set long, 3 operand [780-0.60]
.index ^Instructions, machine><BISL3
.if manual
.s 1
.endif manual
Description: In 2 operand format, dst is ORed with mask and dst
is replaced by the result. In 3 operand format, src
is ORed with mask and dst is replaced by the result.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BISPSW instruction\*
.restore
.send toc .endif global
.index ^Instructions, machine><BISPSW
.else manual
2 BISPSW
.endif manual
.nf
Purpose: bit set PSW - set trap enables
.if manual
.s 1
.endif manual
Format: opcode mask.rw
.if manual
.s 1
.endif manual
Operation: PSW = PSW OR mask
.if manual
.s 1
.endif manual
C. Codes: N = N OR mask_<3_>; Z = Z OR mask_<2_>
V = V OR mask_<1_>; C = C OR mask_<0_>
.if manual
.s 1
.endif manual
Exceptions: Reserved operand
.if manual
.s 1
.endif manual
Opcode: B8 BISPSW Bit set PSW [780-1.00]
.if manual
.s 1
.endif manual
Description: The PSW is ORed with mask and PSW is replaced by the
result.
.if manual
.s 1
.endif manual
Notes: A reserved operand fault occurs if mask_<15:8_> is not
zero.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BITx instructions\*
.restore
.send toc .endif global
.else manual
2 BITx
.endif manual
.nf
Purpose: test a set of bits for all zero
.if manual
.s 1
.endif manual
Format: opcode mask.rx,src.rx
.if manual
.s 1
.endif manual
Operation: tmp = {src AND mask}
.if manual
.s 1
.endif manual
C. Codes: N = {tmp LSS 0}, Z = {tmp EQL 0}, V = 0, C = C
.if manual
.s 1
.endif manual
Exceptions: None
.if manual
.s 1
.endif manual
Opcodes: 93 BITB Bit test byte [780-0.40]
.index ^Instructions, machine><BITB
B3 BITW Bit test word [780-0.40]
.index ^Instructions, machine><BITW
D3 BITL Bit test long [780-0.40]
.index ^Instructions, machine><BITL
.if manual
.s 1
.endif manual
Description: mask is ANDed with src. Both operands are unaffected.
The only action is to affect the condition codes.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BLBx instructions\*
.restore
.send toc .endif global
.else manual
2 BLBx
.endif manual
.nf
Purpose: branch on low bit - test bit
.if manual
.s 1
.endif manual
Format: opcode src.rl,displ.bb
.if manual
.s 1
.endif manual
Operation: teststate = if {BLBS} then 1 else 0; if src_<0_>
EQL teststate then PC = {PC + SEXT (displ)}
.if manual
.s 1
.endif manual
C. Codes: Not affected
.if manual
.s 1
.endif manual
Exceptions: None
.if manual
.s 1
.endif manual
Opcodes: E8 BLBS Branch on low bit set [780-1.00]
.index ^Instructions, machine><BLBS
E9 BLBC Branch on low bit clear [780-1.00]
.index ^Instructions, machine><BLBC
.if manual
.s 1
.endif manual
Description: The LSB of src is tested and if it is equal to the
test state indicated by the instruction, the branch
is taken.
.if manual
.s 1
.endif manual
Notes: src is taken in longword context although only one
bit is tested. The times shown are for successful
branching. If the branch is not tken the time for
both instructions is [780-0.60].
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BPT instruction\*
.restore
.send toc .endif global
.index ^Instructions, machine><BPT
.else manual
2 BPT
.endif manual
.nf
Purpose: breakpoint trap - stop for debugging
.if manual
.s 1
.endif manual
Format: opcode
.if manual
.s 1
.endif manual
Operation: PSL_<TP_> = 0; {breakpoint fault}
.if manual
.s 1
.endif manual
C. Codes: N = 0, Z = 0, V = 0, C = 0
.if manual
.s 1
.endif manual
Exceptions: None
.if manual
.s 1
.endif manual
Opcode: 03 BPT Breakpoint fault
.if manual
.s 1
.endif manual
Description: This instruction is used, together with the T-bit,
to implement debugging facilities.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BR instructions\*
.restore
.send toc .endif global
.index ^Instructions, machine><BR
.else manual
2 BR
.endif manual
.nf
Purpose: transfer control (branch)
.if manual
.s 1
.endif manual
Format: opcode displ.bx
.if manual
.s 1
.endif manual
Operation: PC = PC + SEXT (displ)
.if manual
.s 1
.endif manual
C. Codes: Not affected
.if manual
.s 1
.endif manual
Exceptions: None
.if manual
.s 1
.endif manual
Opcodes: 11 BRB Branch with byte displacement
[780-0.60]
31 BRW Branch with word displacement
[780-0.80, 750-2.01, 730-2.61]
[780F-0.80, 750F-2.01, 730F-2.57]
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BSBx instructions\*
.restore
.send toc .endif global
.else manual
2 BSBx
.endif manual
.nf
Purpose: branch to subroutine - transfer control to subroutine
.if manual
.s 1
.endif manual
Format: opcode displ.bx
.if manual
.s 1
.endif manual
Operation: -(SP) = PC; PC = {PC + SEXT (displ)}
.if manual
.s 1
.endif manual
C. Codes: Not affected
.if manual
.s 1
.endif manual
Exceptions: None
.if manual
.s 1
.endif manual
Opcodes: 10 BSBB Branch to sub., byte displ. [780-1.20]
.index ^Instructions, machine><BSBB
30 BSBW Branch to sub., word displ. [780-1.20]
.index ^Instructions, machine><BSBW
.if manual
.s 1
.endif manual
Description: PC is pushed onto the stack as a longword and the
branch is taken.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*BUGx instructions\*
.restore
.send toc .endif global
.else manual
2 BUG
.endif manual
.nf
Purpose: bugcheck
.if manual
.s 1
.endif manual
Operation: {fault to report error}
.if manual
.s 1
.endif manual
C. Codes: not affected
.if manual
.s 1
.endif manual
Exceptions: Reserved instruction
.if manual
.s 1
.endif manual
Opcodes: FEFF BUGW Bugcheck with word message identifier
.index ^Instructions, machine><BUGW
FDFF BUGL Bugcheck with longword message id
.index ^Instructions, machine><BUGL
.if manual
.s 1
.endif manual
Description: The hardware treats these opcodes as RESERVED to
Digital and faults. The VAX/VMS operating system
treats these as requests to report software-detected
errors. The in-line message identifier is zero
extended to a longword and interpreted as a
condition value. If the process is privileged to
report bugs, a log entry is made. If the process is
not privileged, a reserved instruction is signalled.
.if manual
.test page 10
.send toc .ifnot global
.save
.flags bold
.hl 1 ^*CALLG instruction\*
.restore
.send toc .endif global
.index ^Instructions, machine><CALLG
.else manual
2 CALLG
.endif manual
.nf
Purpose: call with general argument list - invoke a procedure
with actual arguments from anywhere in memory
.if manual
.s 1
.endif manual
Format: opcode arglist.ab,dst.ab
.if manual
.s 1
.endif manual
Operation: {align stack}; {create stack frame}; {set arithmetic
trap enables}; {set new values of AP, FP, PC}
.if manual
.s 1
.endif manual
C. Codes: N = 0, Z = 0, V = 0, C = 0
.if manual
.s 1
.endif manual
Exceptions: Reserved operand
.if manual
.s 1
.endif manual
Opcode: FA CALLG Call proc., general arglist [780-9.40]
.if manual
.s 1
.endif manual
Description: SP is saved in a temporary (tmp) and then bits 1:0
of SP are cleared so the stack is longword aligned.
The procedure entry mask (pointed to by dst) is
scanned from bit 11 to bit 0 and the contents of the
registers whose numbers correspond to set bits in
the mask are pushed on the stack as longwords. Next
AP, FP and the current PC are pushed onto the stack
as longwords. The condition codes are cleared. A
longword containing the saved two low bits of SP in
bits 31:30 (tmp), 0 in bits 29:28, the low 12 bits
of the entry mask in bits 27:16 and the PSW in bits
15:0 with T cleared is pushed on the stack. A
==End of part 1=============================================================