jep@oink.UUCP (08/15/87)
IMSAI SIO documentation
Someone posted news requesting documentation for an old IMSAI SIO
board. I have the dox, but have deleted that old news with the
requestor's identity. Please send me your address so I can forward
the dox.
Until then, short pins 1&16, 2&15, 3&14, 4&13, 5&12, 7&10, and 8&9 of
sockets A3 and B8 to wire ports as DTEs. C7 is for a DIP switch: four
pairs of complementary switches.
a7 pins 1,2,15,16
.
.
.
a4 pins 7,8,9,10
for I/O mapped operation short pins 5&12, and 8&9 of D6.
Baud rate: connect one of pins 1(9600) - 8(110) to both pins 11&12 of B11
My board is a Rev 3
James E. Prior {ihnp4|cbosgd}!n8emr!oink!jep