roskos@IDA.ORG (Eric Roskos) (10/26/89)
The story continues ... Last night I modified my previously unmodified A&A board to bring the /RD and /WR lines from the A/D converter to the set of pins on the edge of the demodulator board. After doing this, and building the logic on the 8-bit port board to generate the /RD and /WR pulses when the port was accessed, I connected it all together, and found that the problem still exists! So it is not due to incomplete conversions being read from the board. It appears simply to be a problem with the demodulator board itself... possibly that the A/D converter that is used is too slow to convert a particular value of the demodulated signal before it changes to a new value, so the ADC gets partway through the conversion, finds the value has changed significantly, and gets 0's for the low-order bits as a result. The distribution of values out of the A/D converter is interesting... the values with low-order bits of zero seem to "borrow" from neighboring values, and the height of the spikes is in proportion to the number of low-order bits that are zero. For example, a portion of the curve looks something like this: -------- -------- <- these 3 show what the frequency counts "should" be -------- 6FH -- 70H ----------------- 71H --- 72H --------- 73H ----- 74H ------------ 75H ------ I did some testing with artificially-generated files to be sure it's not the histogram-producing software (it's not); and with random white noise (it gave a plausible distribution of the white noise, but with the "borrowing" anomaly as shown above). At this point I don't have a good idea as to what might be causing it. It doesn't adversely affect the WEFAX pictures you get if you only use 4-bit data, and in fact the pictures are very good considering the price of the demodulator (both the AM and FM demodulators purchased together cost around $85), but it means you can't do enhancements of low-contrast areas of the image, or other types of image enhancements that rely on having data at a higher grey-scale resolution than you are able to display. It looks like some artifact of how the ADC works... I have an ADC0820 which I am thinking of trying to see if it works better (the A/D converter on the A&A board is an ADC0804), since the ADC0820 has a built-in sample and hold, and can convert at around 20,000 samples/second. -- Eric Roskos (roskos@CS.IDA.ORG or Roskos@DOCKMASTER.NCSC.MIL)
davidc@vlsisj.VLSI.COM (David Chapman) (11/01/89)
In article <1989Oct25.170818.1007@IDA.ORG> roskos@IDA.ORG (Eric Roskos) writes: >...It appears simply to >be a problem with the demodulator board itself... possibly that the >A/D converter that is used is too slow to convert a particular value of the >demodulated signal before it changes to a new value, so the ADC gets partway >through the conversion, finds the value has changed significantly, and >gets 0's for the low-order bits as a result. > >... > >It looks like some artifact of how the ADC works... I have an ADC0820 >which I am thinking of trying to see if it works better (the A/D >converter on the A&A board is an ADC0804), since the ADC0820 has a >built-in sample and hold, and can convert at around 20,000 >samples/second. Your symptoms are definitely those of a missing sample/hold amplifier. I was building a data logger using a 12-bit, 70 kHZ ADC (back in '82 when 12-bit A/D was hard to do cheaply) and I was having severe noise problems. I was getting only 8 of the 12 bits reliably. I sent the ADC back with a complaint (it was a $135 hybrid module). They couldn't find anything wrong but sent me a new one anyway. It failed too. That caused me to look at my design more closely, and I found that I had omitted the sample/hold capacitor (the app note made it look optional). I put the cap in, and I had 12 bits of A/D again. How embarrassing. :-( If the ADC doesn't have sample/hold, and you can put in one that does, by all means do so. I wouldn't trust an ADC at anything close to the Nyquist limit for your input data without sample/hold. -- David Chapman {known world}!decwrl!vlsisj!fndry!davidc vlsisj!fndry!davidc@decwrl.dec.com