dank@moc.jpl.nasa.gov (Dan Kegel) (10/16/89)
Phil (camscan!phil@nsfnet-relay.ac.uk) asked, roughly, > I'm looking for software to do schematic capture, digitial simulation, and > PCB layout. Can anyone comment on the programs offered by Dazix, Valid, > or Mentor? I've been using Valid for schematic capture and Gateway Design's Verilog for logic simulation for several months. This is my first experience with CAD, so I can't compare with other systems. Verilog is a very capable and easy to use language and simulator. In my first week, I was able to write and test detailed behavioral models for a static RAM, an EPROM, and a registered PROM. Verilog's graphical output facility is quite servicable. Setup and run time for a large (5000-gate) circuit plus a behavioral model of a microprocessor are about 1 minute + 1 sec/microsec on a Sparc workstation. Technical support is excellent. Valid's graphical schematic editor works fairly well. We had a rough time for the first two months (!) learning how to set up componant libraries and produce readable hierarchical schematics, but that probably isn't Valid's fault. We also had to spend a few weeks setting up our working environment (drawings are stored under SCCS, and Make is used to retrieve and compile the designs). On the down side, the editor crashes about once a week. The vendor has shown little sympathy- they can't believe it crashes. On top of that, many tech support people seem to have little experience with the tools they are supporting; evidently the engineers are shielded from the customers. In case a salesman tries to tell you that the editor doesn't crash, here are commands to demonstrate two fatal bugs in GED 9.0 under SunOS: 1. cha' (the punctuation makes a case statement abort) 2. set default_grid 0 edit size b page.body (Floating-point exception due to fine grid) - Dan Kegel -- Caltech Mars Observer Camera Project -- dank@moc.jpl.nasa.gov