harp@terra.pkg.mcc.com (Christopher North-Keys) (02/16/90)
[Explicit disclaimer on this one: these opinions are my personal opinions, subject to change without notice and possibly without reason; my employers can go find their own opinions...] What I've heard about memory chip design (hopefully correct)... Sun has been shipping 4/390s with 100ns access time memory chips, and we believe has so been shipping 4/330s and 4/370s. The Sun4/SPARC Hardware Configuration Guide of Nov 1989 states that a Sun 4/3xx uses a cycle time from chips of 40ns. The cycle time of 40ns is trivially derived from the clock speed of 25MHz. Interleaving access effectively doubles this period to 80ns from the standpoint of the memory chips. It is this number (80ns) which is to be compared to the intended chip speed. 100ns chips fail this criterion by 20%-25% (depending on perspective). 100ns is *not* within the defined range for any of the SPARC Suns *except* for the SS1, and possibly the SPARCserver 1. Now comes the fun part: A good chip manufacturer will test chips at elevated temperature (allegedly 75 - 85 C) for speed with a speed margin of 10% or more. This means that 100ns chips from a *good* production house may well perform in the range expected of 80 to 90 ns chips (Mitsubishi and Toshiba are held in decent regard around here.). Note that all this is being done to make them dependable at 100ns, not really for 80ns. So basically Sun's getting away with this approach simply because they've apparently selected a high-grade memory production house, and don't expect temperature conditions in a SPARC 3xx cardcage to get extreme... (didn't you notice all the fans?) Now, you say you're not using a 4/390, and that the $85/Mb 100ns chips are fine in your 4/330. Well, my suggestion is that you remember two things: * SPARC 330s, 370s, and 390s all need 80ns access time performance. * 100ns chips aren't guaranteed to work at 80ns, it's just that the really good ones happen to. You've been fortunate. Christopher North-Keys