Chuck_SirVAX_Staatse@cup.portal.com (02/17/90)
>From the Sun3 and Sun4/SPARC Hardware_Configuration_Guides, November 1989: > (Cycle time is measured in nanoseconds.) Table 1-1 (excerpt) Sun-3 Sun-4 and SPARCsystems CPU/Memory Overview | | |----------Sun-3--------| |-Sun-4-| |--------SPARC---------| | 50 60 80 150 260 470 100 200 1 330 370 390 |MEMORY: |Err Detect bp bp bp bp ECC ECC par ECC |--synchronous parity--| |Cycle Time 270 200 100 270 80 30 70 60 50 |----- 40 ns -----| >Putting 100ns memory in a SS 390 would be idiocy. >Note that even the SS1 uses 50 ns memory, rather than 100. Although I've not seen the configuration document, I believe it is making reference to the CPU clock or CACHE memory cycle time. NOT the DRAM ACCESS time! The SIMMS used on the 4/330,4/370 and 4/390 are 100 nsec ACCESS TIME devices. When buying RAMs, access time it the parameter most often discussed. The cycle time specs for a memory device is how often you can access the device while the access time spec is how long it will take for data to be available from the start of an access. The cycle time is about 1.8 times the access time. For example, using a 100nsec DRAM, the data within the RAM could be read out within about 100nsec from the start of a read operation. However, the RAM could only be accessed once every 180nsec. >100ns is *not* within the defined range for any of the SPARC Suns *except* >for the SS1, and possibly the SPARCserver 1. >So basically Sun's getting away with this approach simply because they've >apparently selected a high-grade memory production house, and don't expect >temperature conditions in a SPARC 3xx cardcage to get extreme... (didn't >you notice all the fans?) >* SPARC 330s, 370s, and 390s all need 80ns access time performance. >* 100ns chips aren't guaranteed to work at 80ns, it's just that > the really good ones happen to. You've been fortunate. NO WAY!!!! SUN machines are well engineered systems. NO responsible Engineer is going to specify a part that does not meet the design parameters if a part exist that does meet those parameters. Bottom line: 100nsec devices work because the system was DESIGNED to use these devices. Before someone starts criticizing anothers design, they had better know what they are talking about.