RWS@MIT-XX.ARPA (12/20/83)
From: Robert W. Scheifler <RWS@MIT-XX.ARPA> 4.2 panics on a machine check when the XB Error bit is set in the MCESR. I have machines which occasionally get both the TB and XB Error bits set simultaneously. Can anyone verify that flushing the TB and restarting will not work in this case, or is 4.2 too conservative? -------