[comp.sys.dec] DECstation cache configuration info wanted

pardo@cs.washington.edu (David Keppel) (11/07/90)

I would like information about the cache configurations on various
MIPS-based DECstations: the size of the caches and the organization of
the caches (e.g., misses in the instruction cache are read from the
first-level data cache).

References to things in print is also useful.

Equivalent information for other MIPS-based products is of passing
interest to me.

Please e-mail, I will post a summary.  Thanks!

		;-D on  ( Cache and carry )  Pardo
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