mark@mips.UUCP (Mark G. Johnson) (10/30/87)
In article <1805@unc.cs.unc.edu>, davis@unc.cs.unc.edu (Mark Davis) writes: >In article <781@unrvax.UUCP> doon@unrvax.unr.edu.UUCP (Harry W Reed) writes: >>Hi, >> I've heard it rumored that Intel has released/announced the >>iAPX 486. This is supposedly a 386 successor. Can anybody comment about >>this? > >There was a short (75 words) announcement in Infoworld a couple of >months ago that intel was going to make an 80486. Few details were >provided, but they estimated that the chip would have 1,000,000 >transistors. "Intel Finalizes Specifications For 80486 Chip" is the title of the article, and it's pretty big (8 column inches). It contains the following excerpts: "The processor, targeted for completion in 1990, will be fabricated using low-power CMOS technology. It will have a 32-bit data bus and the equivalent of 1 million to 1.25 million transistors." "At a presentation given to major Businessland clients, David House, senior vice president of Intel and general manager of the company's Microcomputer Group, described what he called a ``tuned computing engine''. " ``We can put the CPU, cache, accelerator, and I/O on the chip and still have 250,000 transistors available,'' House said." "The 80486 will be compatible with the 8086, 80186, 80286, and 80386 chips, a spokesman stated." "With the dropping price of memory and the 80486's capability of address extremely large amounts of memory, a high-speed, user-intuitive interface built mainly in hardware is conceivable, according to House." *** end of InfoWorld quotations *** Just for idle amusement, a bit of algebraic manipulation might be fun: Suppose that of the 1.25M transistors onboard the 80486, 200k are used for the CPU, accelerator, and I/O {this is conservative since the i386 has 250k transistors}, 250k transistors are "still available", and the remaining 800,000 transistors are used in the on-chip cache. Further suppose that the cache uses a very efficient dynamic RAM cell which requires only 2 transistors per cell (one for selection and one for the storage capacitance element). Further suppose that zero transistors are used for the cache RAM's word selection, data sensing, output muxing, etc. Then you get (800,000 / 2) = 400,000 bits of cache. That's 50K Bytes. So the on-chip cache will be no bigger than 50K Bytes; then when you subtract off some "reality" factors (probably 4 transistors in the cache RAM cell, probably more than 250k transistors for the CPU, I/O, and accelerator) it seems quite likely that the cache size will be no larger than 32K Bytes with 16K Bytes a significant possibility. It'll be interesting to compare this to other 1990-vintage microprocessors that use off-chip caches; it's not hard to imagine these other chips with, say, 8 chips of (1990-vintage) 256K by 4 fast SRAM for a cache, giving 1024K Bytes of cache. -- -Mark Johnson *** DISCLAIMER: The opinions above are personal. *** UUCP: {decvax,ucbvax,ihnp4}!decwrl!mips!mark TEL: 408-720-1700 x208 US mail: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086