[comp.sys.intel] how long is a bus-lock?

yuval@taux01.UUCP (11/30/87)

When the bus-lock prefix is asserted (either explicitly, or as  an  automatic
result  of  XCHG),  how  many  interlocked  bus-cycle are possible before the
locking expires? in particular,  can  a  misaligned  LOCK  STOSD  instruction
cause  the  386  to  write  twice  to memory in interlocked fashion? how many
bus-transactions are interlocked on a misaligned LOCK MOVSD?

Bob-B@cup.portal.com (12/01/87)

>When the bus-lock prefix is asserted (either explicitly, or as  an
>automatic result  of  XCHG),  how  many  interlocked  bus-cycle are
>possible before the locking expires? in particular,  can  a  misaligned
>LOCK  STOSD  instruction cause  the  386  to  write  twice  to memory in
>interlocked fashion? how many bus-transactions are interlocked on a
>misaligned LOCK MOVSD?

God only knows. :-)

In theory, though, a LOCK STOSD or LOCK MOVSD would cause an '86 processor
to lock the buss for the entire length of the buss transaction.  That is,
if STOSD were to execute with one write, the LOCK would be just for that
period.  But, if the STOSD was to a misaligned place, the LOCK would be
just extended ... it would cover both writes.



 
 
 
 
 
 
 
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