rry@homxc.UUCP (R.YADAVALLI) (03/10/88)
Hello, I am not sure if this is the appropriate newsgroup for this question. I am sorry if any one is offended. I am working on an application using the Intel 8274 Multi-Protocol Serial Controller chip along with an 80186. The 8274 is used in the SDLC mode in a DMA mode in conjunction with an Intel 8237 DMA controller. Specifically, I am trying to transmit the SDLC frames with the CRC greneration turned OFF. The documentation on the 8274 claims that this is possible by setting one of the write registers to the right value. In fact, according to the data sheet, there are a couple of ways of accomplishing this. My experience after trying all permutations and combinations is that the 8274 interrupts the 80186 only when the correct CRC is transmitted. In other words, any attempt to diable transmission of CRC will result in disabling of the Transmitter Underrun/End of Message interrupt also. Consequently, only one frame can successfully be transmitted. But, the CPU will not find out when the transmission is complete. I have spoken to a couple of people at Intel who told me that the configuration and the initialization, etc. were all right. I am not sure if there is problem with the chip itself. If any one has tried doing the same and succeeded, I would be very interested in talking to them. Any or all info and/or pointers will be greatly appreciated. Thanks in advances for all your responses. Raghu Yadavalli AT&T Bell Laboratories, Holmdel, New Jersey (201) 949-6091 P.S. I have been looking for information for almost two months now. Hundreds of calls to the Technical support people have been of no use. I have had a similar experience with questions on Intel's I2ICE emulator. Just wondering if it is me or if it is a common experience dealing with Intel's Technical support.