shoat@cs.glasgow.ac.uk (Dave Shoat) (07/14/88)
I recently took apart a core memory board from a PDP8, just out of curiosity. I was quite amazed at the small size of the magnets - I had to put the board under a microscope to see any detail at all. The whole thing was very intricately made. Does anyone know hoe core memory was manufactured? Was it knitted? By hand or by machine? I'd be interested to know. David Shoat Dept. of Medical Cardiology Glasgow Royal Infirmary.
smryan@garth.UUCP (Steven Ryan) (07/18/88)
In article <1486@crete.cs.glasgow.ac.uk> shoat@cs.glasgow.ac.uk (Dave Shoat) writes: > The whole thing >was very intricately made. Does anyone know hoe core memory was manufactured? >Was it knitted? By hand or by machine? I'd be interested to know. I was told the cores are lined up in a powerful magnetic field and the wires are shot through. Then another field is applied and wires from another direction. Are manufactured. Last I heard, the Shuttle memories are cores. A core memory can retain its information for hours, weeks, or years without any power.
friedl@vsi.UUCP (Stephen J. Friedl) (07/18/88)
In article <1010@garth.UUCP>, smryan@garth.UUCP (Steven Ryan) writes: > > Last I heard, the Shuttle memories are cores. A core memory > can retain its information for hours, weeks, or years without any power. Don't ferrite cores have the additional capability of being rad-hard? It seems to me that this would be a good thing for space shots... -- Steve Friedl V-Systems, Inc. +1 714 545 6442 3B2-kind-of-guy friedl@vsi.com {backbones}!vsi.com!friedl attmail!vsi!friedl --------- Nancy Reagan on flood-control: "Just say Noah"-----------
jbn@glacier.STANFORD.EDU (John B. Nagle) (07/19/88)
Most core memory required three wires through every core: X drive,
Y drive, and sense. The X and Y lines are straight, and were usually put
in place with semiautomated techniques similar to weaving. The sense wire,
which zigzags through every core in an array, usually had to be threaded though
the cores by women using tweezers, looking through microscopes. UNIVAC
made core memory in this way through the mid 1970s, in Roseville, MN.
Memory prices for that technology ran about $1M/megabyte.
IBM pioneered automatic core-stringing machinery in the 1960s, but
for a long time, the cores had to be bigger for automatic stringing, which
made the entire memory system much larger.
I could say more, but it's a dead technology.
John Naglebph@buengc.BU.EDU (Blair P. Houghton) (07/19/88)
In article <1010@garth.UUCP> smryan@garth.UUCP (Steven Ryan) writes: > >... Last I heard, the Shuttle memories are cores. A core memory >can retain its information for hours, weeks, or years without any power. You are kidding, aren't you? core is the lowest-density recording medium since paper tape. The shuttle would use bubbles for nonvolatile, read-write memory, I would hope. Even EEROM, which must be in the system somewhere... Not even NASA would be 15 years behind on technology... ;-) --Blair
ray@micomvax.UUCP (Ray Dunn) (07/19/88)
In article <1486@crete.cs.glasgow.ac.uk> shoat@cs.glasgow.ac.uk (Dave Shoat) writes: >.... Does anyone know how core memory was manufactured? >Was it knitted? By hand or by machine? I'd be interested to know. > There may have been a machine process for manufacturing of core memory boards, but I am not aware of it. I *do* know that much core memory was manufactured by hand by female labour in tradition *lace making* areas, e.g. Portugal. The dexterity required to thread the control and sense wires through the core donuts is, seemingly, very similar to that in lacemaking. -- Ray Dunn. | UUCP: ..!{philabs, mnetor}!micomvax!ray Philips Electronics Ltd. | TEL : (514) 744-8200 Ext: 2347 600 Dr Frederik Philips Blvd | FAX : (514) 744-6455 St Laurent. Quebec. H4M 2S9 | TLX : 05-824090
markb@sm.unisys.com.UUCP (Mark Biggar) (07/19/88)
In article <1486@crete.cs.glasgow.ac.uk> shoat@cs.glasgow.ac.uk (Dave Shoat) writes: >... I was quite amazed at the small size of the magnets - I had to >put the board under a microscope to see any detail at all. The whole thing >was very intricately made. Does anyone know hoe core memory was manufactured? >Was it knitted? By hand or by machine? I'd be interested to know. Unfortunately a large majority of core memory was hand-made by teenage girls working in sweat-shops for less then a $1/hr in several oriential countries like Korea. This cost less then making core plains by machine. Mark Biggar {allegra,burdvax,cbosgd,hplabs,ihnp4,akgua,sdcsvax}!sdcrdcf!markb markb@rdcf.sm.unisys.com
ddb@ns.UUCP (David Dyer-Bennet) (07/19/88)
In article <1486@crete.cs.glasgow.ac.uk>, shoat@cs.glasgow.ac.uk (Dave Shoat) writes: > Does anyone know hoe core memory was manufactured? > Was it knitted? By hand or by machine? I'd be interested to know. The stringing of the cores onto the wires was done by hand. DEC had photos of people performing this operation in various material I saw during the time core memory was the current technology. It was generally done under a binocular microscope, to give the people some sort of fighting chance of getting it right. -- -- David Dyer-Bennet ...!{rutgers!dayton | amdahl!ems | uunet!rosevax}!umn-cs!ns!ddb ddb@viper.Lynx.MN.Org, ...{amdahl,hpda}!bungia!viper!ddb Fidonet 1:282/341.0, (612) 721-8967 hst/2400/1200/300
schamp@pyrglass (Craig Schamp) (07/19/88)
In article <458@buengc.BU.EDU> you write: >In article <1010@garth.UUCP> smryan@garth.UUCP (Steven Ryan) writes: >> >>... Last I heard, the Shuttle memories are cores. A core memory >>can retain its information for hours, weeks, or years without any power. > >You are kidding, aren't you? core is the lowest-density recording >medium since paper tape. The shuttle would use bubbles for nonvolatile, >read-write memory, I would hope. Even EEROM, which must be in the >system somewhere... Not even NASA would be 15 years behind on >technology... ;-) > > --Blair I recall reading in a magazine (Communications of the ACM?) a few years ago that the Shuttle does in fact have core memory in its 5-redundant computer system. The on-board computers were built by IBM Federal Systems. Remember that the Space Shuttle was being designed some 15 or more years ago. Also, it seems to me that in space-based and defense applications, reliability counts more than "high-technology for technology's sake". --- Craig Schamp Pyramid Technology Corporation (415) 965-7200 x4550 1295 Charleston Rd, Mountain View, CA 94043 schamp@pyramid.com {allegra,ames,decwrl,hplabs,munnari,sun,uunet,utai}!pyramid!schamp = Opinions expressed do not necessarily reflect those of my employer. =
dave@westmark.UUCP (Dave Levenson) (07/19/88)
In article <1486@crete.cs.glasgow.ac.uk>, shoat@cs.glasgow.ac.uk (Dave Shoat) writes: > I recently took apart a core memory board from a PDP8, just out of > curiosity. I was quite amazed at the small size of the magnets - I had to > put the board under a microscope to see any detail at all. The whole thing > was very intricately made. Does anyone know hoe core memory was manufactured? > Was it knitted? By hand or by machine? I'd be interested to know. I don't know how DEC core planes were made, but back in 1970 or so when I worked for Interdata (more recently known as Perkin Elmer and then as Concurrent Computer Co) we made core planes by hand. A large room in the factory, known as the "core house", was populated by about 25 employees who "stitched" the wires through the cores by hand. They sat at tables with magnifying lamps (the kind where you look through a 6-inch diameter lens which is surrounded by a circular fluorescent tube) and watched their work through the glass. They also made ROMS by hand! They threaded thousands of wires through or around individual transformer cores, arranged in a row of 16. Each wire represented an address, and its content was determined by which cores (or bits) it passed through, and which it passed around. When the address line was decoded, it was pulsed, and the sense wires of the transformers through which the address line passed sensed this pulse. -- Dave Levenson Westmark, Inc. The Man in the Mooney Warren, NJ USA {rutgers | att}!westmark!dave
davidsen@steinmetz.ge.com (William E. Davidsen Jr) (07/19/88)
In article <458@buengc.BU.EDU> bph@buengc.bu.edu (Blair P. Houghton) writes: | You are kidding, aren't you? core is the lowest-density recording | medium since paper tape. The shuttle would use bubbles for nonvolatile, | read-write memory, I would hope. Even EEROM, which must be in the | system somewhere... Not even NASA would be 15 years behind on | technology... ;-) Actually I believe that core is more reliable in a normal environment, much more reliable when exposed to radiation. I suspect that they would be potted for vibration protection. What is the most reliable solution and what is cost effective for the mass market are often not the same. -- bill davidsen (wedu@ge-crd.arpa) {uunet | philabs | seismo}!steinmetz!crdos1!davidsen "Stupidity, like virtue, is its own reward" -me
aad@stpstn.UUCP (Anthony A. Datri) (07/19/88)
In article <458@buengc.BU.EDU> bph@buengc.bu.edu (Blair P. Houghton) writes: >>... Last I heard, the Shuttle memories are cores. A core memory >>can retain its information for hours, weeks, or years without any power. >You are kidding, aren't you? core is the lowest-density recording >medium since paper tape. The shuttle would use bubbles for nonvolatile, >read-write memory, I would hope. Even EEROM, which must be in the >system somewhere... Not even NASA would be 15 years behind on >technology... ;-) Back at CMU I had the occasion to take a History of Computing course from one Jim Tomayko, who had worked for NASA for a good while. He said that the shuttle machines each had 106k of CORE. EEPROMS are, I believe, too sensitive to large, powerful cosmic rays that tend to buzz around up there. -- @disclaimer(Any concepts or opinions above are entirely mine, not those of my employer, my GIGI, or my 11/34) beak is beak is not Anthony A. Datri,SysAdmin,StepstoneCorporation,stpstn!aad
jwatts@hpihoah.HP.COM (Jon Watts) (07/20/88)
Up until about 2 months ago I worked for a company that makes (note *present*
tense :-( ) core memories. I worked on core memories extensively while there.
Most core memories used by the computer industry were hand strung but the
newer ones are machine strung (machine stringing was introduced around 1978).
In a hand strung memory the cores are loaded by operators using tweezers and
microscopes and threaded with tiny needles. In machine strung memories the
cores are shaken into a fine grate which aligns them in the proper orientation.
In the ones my company made (I don't know about any one elses) one edge of the
each core was allowed to sink into a sheet of unvulcanized rubber which was
then cured to cement the cores in place. The core mats then were strung by a
machine designed specifically for that purpose. The way it works is the
machine first welds needles to the ends of the select wires. The needles are
long enough to pass all the way through the core mat, come out the other side,
and be grabed by the machine again. The needles are held in a pair of jaws
which has a groove for each needle. The jaws push the lines through a core
mat until it is grabed on the otherside by another set of jaws this is repeated
until the wires have passed through all the core mats in the assembly
(typically 1 mat for each bit in the word width). After all the mats have been
strung along one axis the process is repeated for the other axis and then for
the sense lines and inhibit lines (if present - some designs use the same lines
for both sense and inhibit) after the lines have been strung they are
terminated by soldering them to pads on the board which connect them to the
drive and sense electronics. The soldering is semi-automatic, the operator
must align the soldering head but the head heats pulses to remove insulation
and solder following a programmed profile. Once assembled the core assembly
is acordian folded to make a more compact package.
The sizes of the components involed are truly amazing the newer of the
designs I worked on used 13 mil cores (that's 0.013 inch outside diameter -
approximately 7 mils I.D.), was strung with 44 and 48 gauge wire and contained
aprox. 600,000 cores (32K x 17 bits plus spare rows and columns). The
assemblies I worked with were for a military application and so operated from
-55c to +71c they cost aprox. $15K to build and sold for aprox. $25K. The
physical size is aprox. 6"x4"x2.5" plus and external card aprox. 6"x4" is
needed for every two memory assemblies.
I believe the statement that the shuttles main computers use core is
correct. They also use relatively old core technology. I heard they are have
4Kwords of memory (16 bits plus EDC I think). Cores have several advantages
that the military and aerospace industries like and semiconductor memory
technologies are only in the last 2 or 3 years beginning to suppant them.
First of all they are non-volatile, you can leave a core memory with data in it
sit for years and it will still have the data when you come back. Secondly
they are very resistant to external influences (read rad-hard), as long as
there is no current in the drive and sense lines you won't switch a core; and
the current needed to switch is on the order of half an amp far, more than most
noise. They are read/write with unlimited write cycles and read and write take
the same amount of time (750 nS in the example above). They also have good
reliability (amazing I know, I don't understand it but if you get one working
in the first place they just won't die).
On the down side the cost is very high (see above). They drink power
(the example system is about 15 or 20 watts). They are large and heavy. They
are slow. And they are extremely difficult to design.
I am very pleased to say that the military has finally come to their
senses and started to allow the use of battery backed CMOS static RAM in place
of cores. It took a long time because the military does not like batteries
(they create logistics problems since they need periodic replacement and are
potentially hazardous), but they are now allowing cores to pass into the
history of computers rather than remain a living dinosaur.
+-------------------------------------------+
|These opinions do not neccessarily reflect |
|those of my employer, my country or anyone | -Jon Watts
|else if fact they aren't even opinion in |
|fact they don't even exist, neither do I |
|your hallucinating again. Is this Kansas? |
+-------------------------------------------+mec@ardent.UUCP (Michael Chastain) (07/20/88)
I've read that NASA successfully recovered the Challenger core memories. Talk about a violent "core dump"! Source: an Ampex employee newsletter (the Ampex Amplifier, I think), sometime in 1987. Ampex makes core memories for, among other things, shuttles. Michael Chastain mec@ardent.com hplabs!ardent!mec "He who dies with the most FRIENDS wins."
lpress@venera.isi.edu (Laurence I. Press) (07/20/88)
I recall seeing a machine to automate core manufacture at IBM (San Jose or upstate New York) back in the early 60s. It had a vibrating flat bed with an array of tiny grooves for the cores to fall into. When they were all lined up, it stopped vibrating and wires were pushed through. I am sure it took some manual tweeking, but it was basically mechanized.
roy@phri.UUCP (Roy Smith) (07/20/88)
jbn@glacier.UUCP (John B. Nagle) writes: > I could say more [about building core memory], but it's a dead technology. Is it? I remember reading somewhere (IEEE Spectrum a few years ago?) that the space shuttle uses core memory because it is 1) radiation hard and 2) static (i.e. no loss of memory on loss of power). Apparently the slow speed, power-hungry operation, and low information density are outweighted by the other factors. Can anybody corroborate this? -- Roy Smith, System Administrator Public Health Research Institute {allegra,philabs,cmcl2,rutgers}!phri!roy -or- phri!roy@uunet.uu.net "The connector is the network"
bph@buengc.BU.EDU (Blair P. Houghton) (07/21/88)
In article <427@ardent.UUCP> mec@ardent.UUCP (Michael Chastain) writes: >I've read that NASA successfully recovered the Challenger core >memories. Talk about a violent "core dump"! > ha-Hah! |-) > >Source: an Ampex employee newsletter (the Ampex Amplifier, I think), >sometime in 1987. Ampex makes core memories for, among other things, >shuttles. Any word on whether the data was intact? I would guess they'd hire clowns and trumpets to announce _that_. I've gotten a lot of good responses to my apprehension upon finding out that the shuttle indeed does use mag. core memory. The best excuse given for still using it is "closing the design" (sorry, I've misplaced the messages and I don't know who to thank :-( ). NASA would have gone out of its way to modernize the system were it not for the fact that Government likes to move slow and sure wherever it's unnecessary, and fast and pragmatic wherever it's dangerous. Number two (but only slightly less significant) is radiation-hardness. Now, my next question: what kind of feathers are used on the MX missile? My sysadmin swears its pheasant, but I think it would be pigeon, to save money and because of second-sourcing requirements... :-) --Blair
leonard@bucket.UUCP (Leonard Erickson) (07/21/88)
In article <458@buengc.BU.EDU> bph@buengc.bu.edu (Blair P. Houghton) writes: <In article <1010@garth.UUCP> smryan@garth.UUCP (Steven Ryan) writes: <> <>... Last I heard, the Shuttle memories are cores. A core memory <>can retain its information for hours, weeks, or years without any power. < <You are kidding, aren't you? core is the lowest-density recording <medium since paper tape. The shuttle would use bubbles for nonvolatile, <read-write memory, I would hope. Even EEROM, which must be in the <system somewhere... Not even NASA would be 15 years behind on <technology... ;-) Uh, hate to burst your bubble, but *all* of the Shuttle hardware uses 15-20 year-old technology. Remember? It was designed that long ago, and they wanted reliablity, not state-of-the-art. I seem to recall hearing that it doesn't even use microprocessors. In any case, you don't use things like modern static or dynamic RAM chips in space applications. A cosmic rays and the like will be guaranteed to zap memory cells frequently. I don't know if the use core, but it would be *safer*. -- Leonard Erickson ...!tektronix!reed!percival!bucket!leonard CIS: [70465,203] "I used to be a hacker. Now I'm a 'microcomputer specialist'. You know... I'd rather be a hacker."
phil@titan.rice.edu (William LeFebvre) (07/21/88)
In article <3397@phri.UUCP> roy@phri.UUCP (Roy Smith) writes: >jbn@glacier.UUCP (John B. Nagle) writes: >> I could say more [about building core memory], but it's a dead technology. > > Is it? I remember reading somewhere (IEEE Spectrum a few years >ago?) that the space shuttle uses core memory because it is 1) radiation >hard and 2) static (i.e. no loss of memory on loss of power). Apparently >the slow speed, power-hungry operation, and low information density are >outweighted by the other factors. Can anybody corroborate this? Yes, the shuttle's onboard computers do in fact still use core memory. But that doesn't necessarily mean that the technology isn't dead. The decision to use core memory was made many years ago, primarily because of the reasons you state but also because it was a proven technology. They didn't want to take unnecessary chances. And at this point in time there is alot of momentum that discourages switching to something else. They do use the non-volatility to their advantage, too. It is standard procedure, once on orbit, to load one computer with the re-entry software and turn it off. They call it a "freeze dried" computer. That way, if the tape drives containing the flight software fail, they can still get down. I understand that they are seriously considering switching over to battery backed-up static RAM. They feel that they still need the non-volatility, but there are advantages to switching (less power consumed and less heat generated, and they also want to increase the machines' memory capacity). But I certainly wouldn't use the shuttle to prove that core memory isn't a dead technology. William LeFebvre Department of Computer Science Rice University <phil@Rice.edu>
eugene@pioneer.arc.nasa.gov.arpa (Eugene N. Miya) (07/22/88)
Again?! It's the special issue of CACM (case study) on the shuttle.
I no longer have the specific issue, someone didn't return it. To me,
Denning gave me his to copy which I only did the articles. Go look
this up. I'll put this in the most asked space questions file.
Another gross generalization from
--eugene miya, NASA Ames Research Center, eugene@aurora.arc.nasa.gov
resident cynic at the Rock of Ages Home for Retired Hackers:
"Mailers?! HA!", "If my mail does not reach you, please accept my apology."
{uunet,hplabs,ncar,decwrl,allegra,tektronix}!ames!aurora!eugene
"Send mail, avoid follow-ups. If enough, I'll summarize."karn@thumper.bellcore.com (Phil R. Karn) (07/22/88)
> Is it? I remember reading somewhere (IEEE Spectrum a few years > ago?) that the space shuttle uses core memory because it is 1) radiation > hard and 2) static (i.e. no loss of memory on loss of power). Apparently > the slow speed, power-hungry operation, and low information density are > outweighted by the other factors. Can anybody corroborate this? Yes, the Shuttle computers use core memory, but these two reasons are a bit rationalized. The real reason is that the Shuttle's computers (IBM AP-101s) were already obsolete by the time the Shuttle project chose them. Semiconductor RAM technology is now quite capable of meeting the needs of spaceborne computers; AMSAT-Oscar-13 is flying 32K bytes of error corrected, radiation hardened CMOS RAM from Harris Semiconductor. Even this technology (each physical chip is only 4K bits) is way behind the terrestrial state of the art because of the special need for radiation hardening (100 kilorads in our case). But even conventional dynamic RAM memories can withstand 2-3 kilorads, which is 4-6 times the typical human lethal dose. How the space program ever got the public image of being on the leading edge of computer technology is a mystery to me. The process of designing and certifying a computer system for space flight guarantees that it will be obsolete by the time it flies. Phil
smryan@garth.UUCP (Steven Ryan) (07/22/88)
> EEPROMS are, I believe, >too sensitive to large, powerful cosmic rays that tend to buzz around up there. Somewhat afield, I guess, unless we include ai, but if semiconductors can be fried by the radiation, what happens to humans?
oster@dewey.soe.berkeley.edu (David Phillip Oster) (07/22/88)
In article <1057@garth.UUCP> smryan@garth.UUCP (Steven Ryan) writes: >Somewhat afield, I guess, unless we include ai, but if semiconductors can be >fried by the radiation, what happens to humans? See the latest (August) issue of Scientific American for an article on current thought about error-correcting ribonucleatides. The system goes to a lot of effort to guarantee that the copy is an accurate one of the original DNA, but very little effort into guaranteeing that the original hasn't been changed. Interesting use of checksums. Doesn't use standard polynomials though. I guess some people think they are too good to use international standards.
cck@deneb.ucdavis.edu (Earl H. Kinmonth) (07/22/88)
>Uh, hate to burst your bubble, but *all* of the Shuttle hardware uses >15-20 year-old technology. Remember? It was designed that long ago, and >they wanted reliablity, not state-of-the-art. Nevertheless, every time their budget comes up, they project an image of state-of-the-art technology with immense pay offs to American industry (and the American taxpayer). I think Japanese science commentators have it right when they observe that it is US expenditures on cutting-edge boondoogles like the Shuttle (and of course virtually all military projects) that draw off engineering talent from the civilian sector. What little that works that comes out of US projects can be licensed by followers who have to pay only for the usable results and have none of the overhead costs.
pf@diab.se (Per Fogelstr|m) (07/23/88)
In article <458@buengc.BU.EDU> you write: >In article <1010@garth.UUCP> smryan@garth.UUCP (Steven Ryan) writes: >>... Last I heard, the Shuttle memories are cores. A core memory >>can retain its information for hours, weeks, or years without any power. > >You are kidding, aren't you? core is the lowest-density recording >medium since paper tape. The shuttle would use bubbles for nonvolatile, >read-write memory, I would hope. Even EEROM, which must be in the >system somewhere... Not even NASA would be 15 years behind on >technology... ;-) Don't forget radiation sensitivity. I imagine an alpha particle will have difficulties to switch a 'core'.
cjl@ecsvax.uncecs.edu (Charles Lord) (07/23/88)
First off, semiconductor memories DO work in space. Many Getaway Specials on the Shuttle have used vanilla Apple IIs and IBM/PC motherboards for experiment control and data acquisition. Secondly, the Shuttle is OLD. My boss worked at NASA on his Ph.D research on some Shuttle systems... before Neil Armstrong walked on the moon! The hardware designs, newer than that, are still early/mid 70's. -- Charles Lord cjl@ecsvax.UUCP Usenet Cary, NC cjl@ecsvax.BITNET Bitnet #include <std.disclamers> #include <cutsey.quote>
abostick@gethen.UUCP (Alan Bostick) (07/23/88)
In article <1486@crete.cs.glasgow.ac.uk> shoat@cs.glasgow.ac.uk (Dave Shoat) writes: >I recently took apart a core memory board from a PDP8, just out of >curiosity. I was quite amazed at the small size of the magnets - I had to >put the board under a microscope to see any detail at all. The whole thing >was very intricately made. Does anyone know hoe core memory was manufactured? >Was it knitted? By hand or by machine? I'd be interested to know. This is off-the-cuff information, and should not be taken as gospel. Core memory was made by hand, which is explanation for its expense. American computer manufacturers tended to farm it out to plants in the Pacific Rim (e.g. in Hong Kong or Singapore) where life --errr, Labor-- was cheap. Alan Bostick ucbvax!unisoft!gethen!abostick
cjl@ecsvax.uncecs.edu (Charles Lord) (07/23/88)
In article <2490@ucdavis.ucdavis.edu>, cck@deneb.ucdavis.edu (Earl H. Kinmonth) writes: > ...What > little that works that comes out of US projects can be licensed > by followers who have to pay only for the usable results and have > none of the overhead costs. It's worse than that! Through the spinoff and Technology Transfer programs, all non-classified NASA developments are published FREE for all to see, use, and benefit from.. Including the Japanese. Therefore, the Hitachi DRAMs in your PC... -- Charles Lord cjl@ecsvax.UUCP Usenet Cary, NC cjl@ecsvax.BITNET Bitnet #include <std.disclamers> #include <cutsey.quote>
colwell@mfci.UUCP (Robert Colwell) (07/23/88)
In article <1250@thumper.bellcore.com> karn@thumper.bellcore.com (Phil R. Karn) writes: >How the space program ever got the public image of being on the leading >edge of computer technology is a mystery to me. The process of designing >and certifying a computer system for space flight guarantees that it >will be obsolete by the time it flies. > >Phil Maybe the hardware doesn't impress you, but their software sure impresses me. Landing a zillion ton flying brick at Mach 25 with only one chance to succeed ain't no joke. Those folks are doing *something* right. Bob Colwell mfci!colwell@uunet.uucp Multiflow Computer 175 N. Main St. Branford, CT 06405 203-488-6090
bph@buengc.BU.EDU (Blair P. Houghton) (07/24/88)
In article <1057@garth.UUCP> smryan@garth.UUCP (Steven Ryan) writes: >> EEPROMS are, I believe, >>too sensitive to large, powerful cosmic rays that tend to buzz around up there. > >Somewhat afield, I guess, unless we include ai, but if semiconductors can be >fried by the radiation, what happens to humans? Mutations rather than data loss. Humans store information chemically and physically, and it takes a rather large effort to change that information significantly. In contrast, semiconductors store info in binary codes such that changing even one bit changes the entire message, especially when it comes to processor opcodes. Further, human mentation is naturally noisy; hence, a few cosmic-ray-induced, synaptic blips aren't going to be noticed. In summary, Brains is Still Superior to Computerz in Almost Every Way (exception, e.g.: you couldn't handle Arithmetic Shift Left when you were two days out of the shop...) --Blair "No parity bits for me, thanx, I'm driving..."
jl3j+@andrew.cmu.edu (John Robert Leavitt) (07/24/88)
It is my understanding that originally the shuttle used core memory (skylab,
et al. did...), in part due to staticity and in part due to design and
software design. The shuttle's software and computers weren't designed
while roms, proms, eproms, drams, etc. existed and therefore couldn't use
them without major revisions. I belive that now they use ROMs, however
('course I could be wrong...).
-John.
| US-Snail: 5877 Bartlett Street | "And for you, Elric, there is |
| Apt. #2, Pittsburgh, PA 15217 | less reward than the rest may |
| E-Mail: jl3j@andrew.cmu.edu | hope for." |
| Phone: (412) 421-4002 | -Elric of Melnibone |lye@boulder.Colorado.EDU (R. John Lye) (07/26/88)
In article <1057@garth.UUCP> smryan@garth.UUCP (Steven Ryan) writes: >Somewhat afield, I guess, unless we include ai, but if semiconductors can be ================================================== Ever hear of such things as skin cancers? ============================================================== John Lye | ******TRIUMPH***** lye@boulder.Colorado.EDU | Glory Still Exists ==============================================================