elias@uunet.UU.NET (Doug Elias) (09/03/90)
Many thanks to R.Weicker/Siemens and M.Stebbins/MetaWare for their
timely assistance in compiling the following figures. Both the
'89 and '90 data are taken from Intel Performance Briefs:
'89 -- #240588-002
'90 -- #240588-003
and can be ordered by calling 1-800-548-4725.
Data on '89 versions is provided to give an indication of how both
the s/w and h/w technology have progressed in about 1 year.
The following data is taken from email received from RW, and
concerns the circa'89 systems and tests.
##################################
Short summary (33.3 MHz, Green Hills compilers):
Whetstone 20.0 MWIPS (double)
Linpack, FORTRAN BLAS 4.5 MFLOPS (double, rolled)
Linpack, Coded BLAS 8.6 MFLOPS (double)
Dhrystone 2.1 67.3 KDhry/sec
(Intel also gives 40 MHz results, but they are scaled from 33 MHz measurements.)
The performance relation between coded BLAS and FORTRAN BLAS is almost 2,
an indication that the compiler used for this test did not yet really use the
features (dual instruction mode) of the chip.
The only measurement from someone else that I am aware of is
a measurement by Kontron (manufacturer of an 860-based board, in Germany):
They have measured 51.3 KDhry/sec for their 32 MHZ board (in 7/89),
Intel claims 67.3 KDhry/sec for a board with a 33.3 MHz 860.
The memory system used for the two boards may be different.
Reinhold P. Weicker, Siemens AG
##################################
The following data was culled from a fax of part of the '003 Brief, sent
to me by MS, plus compiler info he provided over the phone (thanks again!):
##################################
Both the 33MHz/Intel and the 40MHz/Alacron systems were add-in boards, hosted
by separate IBM-AT's (the actual configurations were not in the fax, but are
described in the TechBrief):
---------------------------------
Benchmark 33MHz 40MHz compiler options
*******************************************************************************
SPEC1.0 20.5 -- Metaware High C
R2.1f -O -sched -Hi -bigalign
GreenHills Fortran
1.8.5 R5.0 -OLM
PacificSierra Res.
VAST-2 2.25.3
Dhrystone(KD/S)
v2.1 68.7 83.1 GH-C 1.8.5 -OLM
v1.1 94.6 114.0 MWH-C R2.1f -O -sched -Hi -bigalign
*v1.1 - 80 "" -O -sched -bigalign
**note**
the difference between the two v1.1 numbers for the 40MHz system is that
the first used "in-line"'ing [against RW's wishes (he's the author of the
Dhrystone, after all ;^)], while the second didn't.
Dhrystone(MIPS)
v2.1 41.5 50.2 GH-C 1.8.5 -OLM
v1.1 53.8 64.9 MWH-C R2.1f -O -sched -Hi -bigalign
[no MIPS provided for the non-"in-line"'d version]
Stanford Integer
[MIPS] 25.5 29.6 GH-C 1.8.5 -OLM
Whetstone(MW/S)
SinglePrec. 25.6 31.7 GH-C 1.8.5 -OLM
DblPrec. 20.0 24.6 "" ""
Linpack(MFLOPS)
Fortran dbl 4.5 5.4 GH-F 1.8.5 + PSR-VAST2 -OLM
Coded dbl 8.7 10.2 "" ""
**provided by Michael Stebbins, MetaWare Product Marketing**
#########################################
Thanks again to ReinholdWeicker and MichaelStebbins.
doug
--
# ____ Internet: elias@theory.tn.cornell.edu
# dr _|_)oug USmail: Adv. Comp. Res. Inst./Cornell Theory Center
# (_| 704A TheoryCtrBldg/C.U./Ithaca/N.Y./14853-5201
# (_|__ MaBelle: 607-254-8829 Fax: 607-254-8888