[sci.math.symbolic] Hardware Verifiers Available

rajgopal@lhotse.cs.unc.edu (Suresh Rajgopal) (09/14/89)

  I am looking for Hardware Verifiers, based on first-order logic
proof systems, or term rewriting systems. Are there any available
on public domain, that I can access and use readily?
 I am looking for something
 which can handle combinational and sequential circuits. It does
 not need to model transistors. Gate level modeling is sufficient;
with a finite state machine model for sequential circuits.

Any pointers/e-mail/US mail contacts/addresses will be appreciated.

Thanks in advance


   Suresh Rajgopal  rajgopal@dopey.cs.unc.edu  uunet!mcnc!unc!rajgopal
    "Variety is the spice of life,
      Thats what the judge is going to tell my wife"