drg@utcsri.UUCP (Dave Galloway) (11/06/86)
Someone here wants to build a single board computer with an Ethernet interface. We have information on three Ethernet chip sets: the AMD Lance, the Intel 82586 and the National 8390. We're looking for information, opinions and rumours on the above chips and any others that will do the same job. Which ones work ? Which ones don't ? Which ones are people using ? What about availability ? Ease of programming ? Please send me mail, and I'll summarize to the net. Thanks.
pat@hprnd.HP.COM (Pat Thaler) (02/21/90)
> > It depends on the processor, but the Intel 82596 is a powerful 32-bit LAN > coprocessor that comes in three flavors - the 82696CA for the 80960CA and > i486, the 82596DX for the 80386DX and the 82596SX for the 80386SX. The chip > can be configured to support all existing 802.3 standards such as 10BASE5, > 10BASE2, 1BASE5, and 10BROAD36. It can also support the proposed standards > 10BASE-T and 10BASE-F. For Ethernet and Cheapernet the 82596 can use the > 82C501AD Ethernet Serial Interface chip. For Twisted Pair Ethernet the 82596 > can use the 82521 Serial Supercomponent. The 82596 can be used in 82586 > software compatibility mode so that you can use existing 82586 driver code. > > ---------- I would like to clarify something. All current and planned 10 Mbps varients of the physical layer for 802.3 use exactly the same MAC definition. Therefore, any MAC chip which supports any of 10BASE2 10BASE5, 10BROAD36, 10BASE-T, or 10BASE-F supports the whole list. The 10 Mbps variants also use the same definition of the physical signaling sublayer (PLS), the upper half of the physical layer. The PLS is basically what is implemented in a chip such as the 82C501. A PLS chip which supports any 10 Mbps physical layer supports them all. The interface between the MAC chip and the PLS chip is proprietary, so generally, you need to get them from the same vendor. Some vendors do make alternate PLS chips for the 82586 (and these are suppose to also work with the 82596). The interface between the PLS chip and the MAU (transceiver) is normally the AUI interface defined in 802.3. Therefore, you can normally use one vendor's PLS chip and another vendor's MAU chip. Higher levels of integration such as PLS and MAC on one chip or PLS and MAU on one chip are likely in the future. 1BASE5 also uses the same MAC definition except that it runs at 1 Mbps and all the time dependent parameters remain the same in bit times and therefore are a factor of 10 longer. Some of the MAC chips which support 10Mbps can run at 1 Mbps and will work for 1BASE5. Some cannot tolerate the slowdown of clock speed. Pat Thaler