[comp.periphs] Designing for the FHF

mjs@cbnews.ATT.COM (martin.j.shannon) (03/17/89)

In article <18167@gatech.edu> ken@gatech.UUCP (Ken Seefried iii) writes:
>I like the idea of a FHF.  Some friends and I have been discussing a
>'public-domain workstation', a higher-end machine whose design is
>freely availible for anyone to build (look a the GNU license).  The
>idea is to run the GNU kernal when and if it ever becomes availible.
>Then (theoreticly), you could build a workstation for cost of parts
>and time.  We have evaluated several approaches to this design.
>Comments?

Yeah, I'd like to suggest that you design for something better than what
current technology can do now.  Over the last several years, processor speeds
have increased something like a factor of 5, and although ther are claims
that the end is in sight, I mostly don't really believe it.  For instance,
there's a company that's shipping 30MHz 80386-based machines (using hi-spec
25MHz parts) today -- how long will it be before there's a 40MHz "official"
part?  So "we" need to design for an (at least potentially) incredibly fast
bus, and include a large (256K?) cache (the larger the cache, the slower
"main" memory can be), option for hardware floating point, and a "real"
intelligent ports card, and some flavor of Ethernet(TM), and a fast multi-
drive disk controller (SCSI-2 may be a real good standard, speed- and
compatibility-wise), hardware implementation of X-Windows, and (what else do
*you* want to see?) ....

But the main point is to look ahead of what current technology *can* do.

>	...ken seefried iii
>	   ken@gatech.edu

-- 
Marty Shannon; AT&T Bell Labs; Liberty Corner, NJ
(Affiliation given for identification only.)

woolstar@cit-vax.Caltech.Edu (John D Woolverton) (03/18/89)

| Yeah, I'd like to suggest that you design for something better than what
| current technology can do now.  Over the last several years, processor speeds
| have increased something like a factor of 5.

And new processors have come out, some doing well, some fading into
the woodwork.  (How many people have heard of a machine based on the
National Semiconductor, or the Clipper Chip set.  I have, but only
because I looked for them.)

| So "we" need to design for an (at least potentially) incredibly fast
| bus, and include a large (256K?) cache (the larger the cache, the slower
| "main" memory can be), option for hardware floating point, and a "real"
| intelligent ports card, and some flavor of Ethernet(TM), and a fast multi-
| drive disk controller (SCSI-2 may be a real good standard, speed- and
| compatibility-wise), hardware implementation of X-Windows, and (what else do
| *you* want to see?) ....

Make it independant.  SCSI and ethernet, make it disk independant;  but
go a few steps farther.  Make it CPU independant.  Make it memory
independant.  Make it display and IO independant.  Anybody remember S100?
What we need, is a modern day S100, where you can take any CPU/MMU/FPU
mother board, stick in any memory board, io board, display board,
disk controller, and it all worked.  You could even design any part you
wanted, and it would interface properly.

| But the main point is to look ahead of what current technology *can* do.

That means in all parts of hardware, people are going to build more,
faster, smaller, and the trick is to mix the old stuff and new stuff
together.  Like how would you use a card designed for a 10Mhz NuBus
with a new 25Mhz NuBus.  Heck, people might be satisfied to keep
disk drives and displays around for years, meaning that they would
be running 100-1000 times slower than the CPU's if technology
keeps up.  How do you keep all these parts talking to each other.

What people want now is pretty clear, a design for a public domain
computer system in comp.sys.ns32k went along for a while, until more
ideas kept coming up, with no one willing to do the work.  But what
new stuff will come out in the future?  New storage devices?  New
network devices and protocals?  New input devices?  

More importantly, if you're going to make a public domain computer
system.  Make one that companies can develop for.  One that makes
sence.  A big idea in the .ns32k group was to build an IBM bus
onto the computer so that available screen and disk controller
cards would be usable.  (Not that IBM bus makes sense, its just
that stuff was available for it and CHEAP!)

Make it free, and then make it FREE!

ken@gatech.edu (Ken Seefried iii) (03/21/89)

In article <4899@cbnews.ATT.COM> mjs@cbnews.ATT.COM (martin.j.shannon) writes:
>
>Yeah, I'd like to suggest that you design for something better than what
>current technology can do now.  

Yea...wouldn't we all.  But that is completely off base for what any
reasonable FSF would want to do.  My concept at least, is to build a
machine that would be reasonably priced to build and could concievably
be wire wrapped.  This means last generation technology.

>       So "we" need to design for an (at least potentially) incredibly fast
>bus,

No, 'we' don't.  Not unless we have some very specific applications.
If you want Cray performace, get a Cray. 'we' want a machine that runs
fast enough to get the job done and runs good software.  'we' can get
by just fine with something on the order of a 10MHz NuBus. 

>	and include a large (256K?) cache (the larger the cache, the slower
>"main" memory can be), 

Ummmm...you need to learn a little more about caches.  You can get the
same hit-rate with a 64K, 2-way cache as a 128K, direct-mapped cache
(93%).  Bigger is not nessesarily better.  In any case, have you
prices building a cache like that lately?  Talk about sticker shock...

>			option for hardware floating point, and a "real"
>intelligent ports card, and some flavor of Ethernet(TM), and a fast multi-
>drive disk controller (SCSI-2 may be a real good standard, speed- and
>compatibility-wise), 

These are pretty reasonable (and being worked on)...

>			hardware implementation of X-Windows, 

What is that?

Its fine to talk about 40MHz parts and big caches and multi-MBs buses,
but down here in the real work, it doesn't work like that.  Little
things like 'what is the price of test equipment that can handle a
40MHz system' suddenly become nasty.

So I'm sorry for all of you that want that type of stuff out of a FSF.
I don't see it happening.  I don't really see a 20MHz machine.  I see
something about a generation and a half old, single user that a decent
hardware hack can wirewrap in his garage (sort of like the first 8080
boxes), that will run real system software (unix-like).  My design
work is going to be in the 16MHz 68020 ballbark, perhaps a bit less
(the original planning looked at a 15MHz NS32332).  Oh...and it will
have an integral display (mono).

I guess the thing that would sum it up is my limit in design is what I
can build paying for it out of my own pocket....

	...ken seefried iii
	   ken@gatech.edu

don@zippy.eecs.umich.edu (Don Winsor) (03/21/89)

In article <18204@gatech.edu> ken@gatech.UUCP (Ken Seefried iii) writes:
>Ummmm...you need to learn a little more about caches.  You can get the
>same hit-rate with a 64K, 2-way cache as a 128K, direct-mapped cache
>(93%).  Bigger is not nessesarily better.  In any case, have you
>prices building a cache like that lately?  Talk about sticker shock...

But hit rate isn't the whole story!  For large caches, overall
performance is more sensitive to the cache access time on a cache
hit than to the cache hit rate.  Practical implementations of
direct-mapped caches are significantly faster than set-associative
caches.  The main reason for this is that a set-associative cache
must have a multiplexor to select the outputs from the appropriate
bank.  A direct-mapped cache does not need any such multiplexor;
thus a significant delay in the critical path is eliminated.
Another advantage of direct-mapped caches is that they are
significantly cheaper that set-associative ones of the same size.

A thorough investigation of this is presented in the article:
Mark D. Hill, "A Case for Direct-Mapped Caches", Computer, volume 21,
number 12, December 1988, pages 25-40, IEEE Computer Society.

Hill shows that for cache sizes above a certain crossover point,
direct-mapped caches will almost always outperform set-associative
caches of the same size.  Depending on the main memory speed and
other details of the cache organization, the crossover point was
found to occur at cache sizes from 8 Kbytes to 64 Kbytes.

Note that Sun uses direct-mapped caches in their highest performance
servers; the Sun 3/280 uses a 64 Kbyte direct mapped cache and the
Sun 4/280 uses a 128 Kbyte direct mapped cache.  Why?  I suspect
it's because they were smart enough to realize that cache access
time was a critical factor limiting performance, and a significantly
faster access time was well worth a tiny penalty in miss ratio.

My personal preference for a new design is for separate instruction
and data caches, each 64 Kbytes (or larger if cost permits) and
direct mapped.  With some of the new cache controller chips appearing
on the market, such a creature shouldn't be too horribly expensive.

Don Winsor
Department of Electrical Engineering and Computer Science
University of Michigan, Ann Arbor, Michigan
don@eecs.umich.edu

dlr@daver.UUCP (Dave Rand) (03/21/89)

In article <10078@cit-vax.Caltech.Edu> woolstar@cit-vax.Caltech.Edu (John D Woolverton) writes:
>
>What people want now is pretty clear, a design for a public domain
>computer system in comp.sys.ns32k went along for a while, until more
>ideas kept coming up, with no one willing to do the work.

Perhaps some people were not willing to do the work. We (george@wombat
and dlr@daver) certainly are willing. And doing. First WW is done.

The problem, as I see it, is that people want the design for free (not
really a problem), plus the software free (more of a problem), plus
the hardware for free. Sigh. It really does cost serious money to do
your own system.

Witness the PD-32. A short lived attempt to get Unix to the masses for
<$1000. It was still too much.

-- 
Dave Rand
{pyramid|hoptoad|sun|vsi1}!daver!dlr

roc@sequent.UUCP (Ron Christian) (03/28/89)

In article <18204@gatech.edu> ken@gatech.UUCP (Ken Seefried iii) writes:
>[...]  My concept at least, is to build a
>machine that would be reasonably priced to build and could concievably
>be wire wrapped.  This means last generation technology.

Why wire wrapped?  There's a lot of places to get circuit cards
made cheap.  Let's put the design on a real circuit card, then
publish the blueprints so anyone can make it, and/or provide the
actual card at reasonable cost.  (Similar to a "media cost" for
software.)  I suspect there's enough interested people with microprocessor
hardware design experience that we could pull it off.

But just having the populated circuit card isn't enough.  One
needs some kind of cage for it.  How about making the card the
same format as... steady now... the IBM AT motherboard?  No really,
I'm serious.  There are now very inexpensive boxes available for
an AT sized motherboard.  Why not take advantage of that?  Note that
I'm NOT suggesting that the FHF card be designed for the X86 processor,
or that it support any of the PC busses.  Just that the boxes
for such a form factor are cheap and plentiful.

What think ye?


			Ron

henry@utzoo.uucp (Henry Spencer) (03/29/89)

In article <13332@sequent.UUCP> roc@crg2.UUCP (Ron Christian) writes:
>But just having the populated circuit card isn't enough.  One
>needs some kind of cage for it.  How about making the card the
>same format as... steady now... the IBM AT motherboard?  No really,
>I'm serious.  There are now very inexpensive boxes available for
>an AT sized motherboard.  Why not take advantage of that?  Note that
>I'm NOT suggesting that the FHF card be designed for the X86 processor,
>or that it support any of the PC busses.  Just that the boxes
>for such a form factor are cheap and plentiful.

Disgusting though the thought is, using one of the PC buses is also
probably a good idea.  That gives you access to cheap peripherals that
you don't have to build -- and debug -- yourself.  One can make a good
argument for also providing a better bus for crucial things, like fast
disks, but nobody is going to want to redesign *all* the interesting
peripherals, and nobody is going to match the production volumes (and
hence cost savings) of (say) AT peripherals.
-- 
Welcome to Mars!  Your         |     Henry Spencer at U of Toronto Zoology
passport and visa, comrade?    | uunet!attcan!utzoo!henry henry@zoo.toronto.edu

byron@pyr.gatech.EDU (Byron A Jeff) (03/29/89)

In article <1989Mar28.171856.21202@utzoo.uucp> henry@utzoo.uucp (Henry Spencer) writes:
-In article <13332@sequent.UUCP> roc@crg2.UUCP (Ron Christian) writes:
->But just having the populated circuit card isn't enough.  One
->needs some kind of cage for it.  How about making the card the
->same format as... steady now... the IBM AT motherboard?  No really,
->I'm serious.  There are now very inexpensive boxes available for
->an AT sized motherboard.  Why not take advantage of that?  Note that
->I'm NOT suggesting that the FHF card be designed for the X86 processor,
->or that it support any of the PC busses.  Just that the boxes
->for such a form factor are cheap and plentiful.
-
-Disgusting though the thought is, using one of the PC buses is also
-probably a good idea.  That gives you access to cheap peripherals that
-you don't have to build -- and debug -- yourself.  One can make a good
-argument for also providing a better bus for crucial things, like fast
-disks, but nobody is going to want to redesign *all* the interesting
-peripherals, and nobody is going to match the production volumes (and
-hence cost savings) of (say) AT peripherals.
--- 
-Welcome to Mars!  Your         |     Henry Spencer at U of Toronto Zoology
-passport and visa, comrade?    | uunet!attcan!utzoo!henry henry@zoo.toronto.edu
Has anyone ever interfaced a PC peripheral with a PC bus connector to
anything other than a 80X86 motherboard? To follow Henry's idea is to 
simply build another PC clone in my estimation. And to be perfectly honest 
why build another PC clone when you can buy one cheaper. I think the
motherboard physical sizing is a good idea but to conform to PC
bus elcetrical specs is a cop out.

Yes my anit-Intel bias is showing...

BAJ
-- 
Another random extraction from the mental bit stream of...
Byron A. Jeff
Georgia Tech, Atlanta GA 30332
Internet:	byron@pyr.gatech.edu  uucp:	...!gatech!pyr!byron

jay@mips.COM (Jay McCauley) (03/30/89)

In article <7745@pyr.gatech.EDU> byron@pyr.UUCP (Byron A Jeff) writes:
>Has anyone ever interfaced a PC peripheral with a PC bus connector to
>anything other than a 80X86 motherboard? To follow Henry's idea is to 
>simply build another PC clone in my estimation. And to be perfectly honest 
>why build another PC clone when you can buy one cheaper. I think the
>motherboard physical sizing is a good idea but to conform to PC
>bus elcetrical specs is a cop out.
>

The MIPS m/120 has an AT bus for peripheral expansion cards.
This is an R2000-based UNIX system, no Intel CPUs anywhere.  There were
some challenges in matching the relatively slow AT bus to the system, and
working out the details of all the bus transactions, but nothing insurmountable.

The system has its own (not AT card based) SCSI, Ethernet and serial ports,
so the AT bus is used in the way Henry suggests.

You get access to some very cost-effective peripheral cards for the
small matter of software for UNIX drivers :-)

henry@utzoo.uucp (Henry Spencer) (03/31/89)

In article <7745@pyr.gatech.EDU> byron@pyr.UUCP (Byron A Jeff) writes:
>Has anyone ever interfaced a PC peripheral with a PC bus connector to
>anything other than a 80X86 motherboard? ...

Yes, it's been done by several outfits as a way of getting access to
cheap peripherals.  The PC buses are ugly and slow but not all that
difficult to talk to.

I take second place to nobody in my loathing for 80i86 processors, but
there are a *lot* of cheap peripherals for PC-bus machines.  Forcing
yourself to reinvent the wheel is usually a mistake.
-- 
Welcome to Mars!  Your         |     Henry Spencer at U of Toronto Zoology
passport and visa, comrade?    | uunet!attcan!utzoo!henry henry@zoo.toronto.edu

jbayer@ispi.UUCP (Jonathan Bayer) (04/01/89)

In article <1989Mar28.171856.21202@utzoo.uucp> henry@utzoo.uucp (Henry Spencer) writes:
>In article <13332@sequent.UUCP> roc@crg2.UUCP (Ron Christian) writes:
}>But just having the populated circuit card isn't enough.  One
}>needs some kind of cage for it.  How about making the card the
}>same format as... steady now... the IBM AT motherboard?  No really,
}>I'm serious.  There are now very inexpensive boxes available for
}>an AT sized motherboard.  Why not take advantage of that?  Note that
}>I'm NOT suggesting that the FHF card be designed for the X86 processor,
}>or that it support any of the PC busses.  Just that the boxes
}>for such a form factor are cheap and plentiful.
}
}Disgusting though the thought is, using one of the PC buses is also
}probably a good idea.  That gives you access to cheap peripherals that
}you don't have to build -- and debug -- yourself.  One can make a good
}argument for also providing a better bus for crucial things, like fast
}disks, but nobody is going to want to redesign *all* the interesting
}peripherals, and nobody is going to match the production volumes (and
}hence cost savings) of (say) AT peripherals.

While I like the idea of an (almost) free computer, I don't think it is
worth it.  Considering that you can go out and buy an *88 board for
under $ 100, and a 286 board for under $ 300, it isn't worth it to
design and build your own (ok, just build).  By the time you get done
buying the chips, circuit board, and other misc. parts, you will have
spent a lot more than that.   On the other hand, if you are doing it for
the _fun_ and the learning experience then it makes sense.



JB
-- 
Jonathan Bayer			      Beware: The light at the end of the
Intelligent Software Products, Inc.	      tunnel may be an oncoming dragon
19 Virginia Ave.				...uunet!ispi!jbayer
Rockville Centre, NY 11570  (516) 766-2867    jbayer@ispi.UUCP