bloom@fortune.UUCP (Chris Bloom) (03/17/88)
I have written a translator in "C" that converts a simulation model written in the CADAT simulation modeling language to either one of two other widely accepted languages being used for simulation modeling. EDIF (Electronic Design Interchange Format) and VHDL (Very_Large_Scale_Integrated Hardware Design Language) are the two language types that can be produced from a CADAT structural model using this program. I have been told that Prolog is optimal for this type of translator. Does anyone have references on the topic of writing translators in Prolog (or Lisp). I am currently modifying the translator to add chip placement information into the EDIF netlist view (which was originally translated from a CADAT model). This will then be run through my homebrew auto-router to produce a schematic. This is currently being done in "C" which is fine. I would though like to know about any similiar work being done using a list processing language. -->Chris B. Bloom