blarson@skat.usc.edu (Bob Larson) (09/29/87)
In article <6488@brl-smoke.ARPA> gwyn@brl.arpa (Doug Gwyn (VLD/VMB) <gwyn>) writes: >Basically, three things are necessary for full support of demand-paged >virtual memory: mappable per-process virtual address space pages, >generation of a trap when a reference is made to an unmapped page, >and ability to restart the faulted instruction after changing the map. Instruction restart is NOT needed, instruction continuation also works quite well. The 68010 and 68020 both use instruction continuation. If there is strict control of code generation, it is even possible to imagine a demand page virtual memory system that does not need either. (Preceed each memory reference instruction by an address validity check instruction -- I assume this would be used on a RISC processor if anywhere.) Many real systems use a combination of techniques: I.E. the PDP-10 uses restart except for the BLT instruction which uses continuation. (I think some of the KL only instuctions also continued.) Each technique has advantages and disadvantages, I don't want to start another holy war. (The basic tradoff is the time to re-do on restart vs. the time and space used to store additional context for continuation -- obviously different for different architectures.) -- Bob Larson Arpa: Blarson@Ecla.Usc.Edu Uucp: {sdcrdcf,cit-vax}!oberon!skat!blarson blarson@skat.usc.edu Prime mailing list (requests): info-prime-request%fns1@ecla.usc.edu