[comp.graphics] VMEbus Frame buffer boards

pptanner@watcgl.waterloo.edu (Peter P. Tanner) (02/25/88)

We will be buying some frame buffer boards for a VMEbus based
multiprocessor and are looking for some boards with a couple of
peculiar characteristics.  If anyone is aware of such boards, I would
appreciate them letting me know.

First of all, since tasks distributed over the different processors on
the system require simultaneous access to the frame buffer, (a simple
example of this would be two tasks, each responsible for a separate
window, writing assynchronously to their own window), the frame buffer
should have multiple register sets.  Taking the write mask as an
example, a single write mask is unusable.  Sharing the write mask
would require an unacceptable overhead.  Several write masks, where
the choice of write mask is made as part of the
"write-to-frame-buffer" instruction (perhaps using some of the high-order
bits in the 32 bit address of the frame buffer) is required.  (The
Adage/Ikonas 3000 has a scheme similar to this.)

The second requirement is that the frame buffer be capable of variable
frame rates up to 90 frame/sec non-interlaced.  

Last year, someone posted a request for information about VMEbus frame
buffers on this net.  If that person (or anyone else) has a synopsis
of what is available, I would appreciate a copy.