LMS5@psuvm.psu.edu (03/19/90)
I was putting this together for a project I am working on and decided to post it. It is a listing of all the VGA registers, what they are called and their default values for mode 12. The book I am referencing is "Programmer's Guide to the EGA and VGA Cards" by Richard F. Ferraro and published by Addison-Wesley Publishing Company. Hopefully, it will be of use to someone other than myself. . . . DEFAULT VALUES FOR MODE 12 ON A VGA CARD (port addresses in parenthesis; r = read; w = write) Display Mode 12: Number of character columns = 80 Length of display buffer = A000h CRTC address = 3D4 CRT_MODE_SET = 29h CRT_PALETTE = 30h number of character rows per screen = 30 Character height = 16 Number of Colors = 16 Number of display pages supported = 1 Miscellaneous state information = 11h Index Default Value General or External Registers: (Each register has its own port address) Miscellanious Output Register(w 3C2/r 3CC) E3 bit 7 Vertical Sync Polarity 6 Horizontal Sync Polarity 5 Page Bit for Odd/Even 4 Disable the Video Drivers (EGA only) 3,2 Clock Select 1 Enable RAM 0 Input/Output Address Feature Control Register (w 3DA/r 3CA) 00 bit 3 Vertical Sync Select (VGA only) 1 Feature control bit 1 (EGA only) 0 Feature control bit 0 (EGA only) Input Status #0 Register (r 3C2) 70 bit 7 Vertical Retrace Interrupt (EGA only) 6 Feature Status 1 (EGA only) 5 Feature Status 0 (EGA only) 4 Switch Sense Input Status #1 Register (r 3DA) 04 5,4 Diagnostic (EGA only) 3 Vertical Retrace 2 Light Pen Switch (EGA only) 1 Light Pen Strobe (EGA only) 0 Display Enable Sequence Registers: Address (rw 3C4/3C5) Reset Register 00 03 bit 1 Synchronous Reset 0 Synchronous Reset (No Asynchronous Reset on VGA) Clocking Mode Register 01 01 bit 5 Screen Off (VGA only) 4 Shift Four (VGA only) 3 Dot Clock 2 Shift Load 1 Bandwidth (EGA only) 0 8/9 Dot Clocks Map Mask Register 02 0F bit 3 Mask Memory Plane 3 2 Mask Memory Plane 2 1 Mask Memory Plane 1 0 Mask Memory Plane 0 Character Map Select Register 03 00 bit 5 Select Character Generator A (High Order - VGA only) 4 Select Character Generator B (High Order - VGA only) 3,2 Select Character Generator A 1,0 Select Character Generator B Memory Mode Register 04 06 bit 3 Chain Four (VGA only) 2 Odd/Even 1 Extended Memory 0 Alpha/Graphics Mode (EGA only) CRTC Registers: Address (rw 3D4/3D5) Horizontal Total Register 00 5F Horizontal Display End Register 01 4F Start Horizontal Blanking Register 02 50 End Horizontal Blanking Register 03 82 bit 7 Compatible Read (VGA only) 6,5 Display Enable Skew 4-0 End Horizontal Blanking Start Horizontal Retrace Register 04 54 End Horizontal Retrace Register 05 80 bit 7 End Horizontal Blanking (VGA only) 6,5 Horizontal Retrace Delay 4-0 End Horizontal Retrace Vertical Total Register 06 0B Overflow Register 07 3E bit 7 Vertical Retrace Start Bit 9 (VGA only) 6 Vertical Display Enable End Bit 9 (VGA only) 5 Vertical Total Bit 9 (VGA only) 4 Line Compare Bit 8 3 Start Vertical Blanking Bit 8 2 Vertical Retrace Start Bit 8 1 Vertical Dispaly Enable End Bit 8 0 Vertical Total Bit 8 Preset Row Scan Register 08 00 6,5 Byte Panning (VGA only) 4-0 Preset Row Scan Maximum Scan Line Register 09 40 bit 7 200 to 400 Line Conversion (VGA only) 6 Line Compare Bit 9 (VGA only) 5 Start Vertical Blanking Bit 9 (VGA only) 4-0 Maximum Scan Line Cursor Start Register 0A 00 bit 5 Cursor On/Off (VGA only) 4-0 Cursor Start Cursor End Register 0B 00 6,5 Cursor Skew 4-0 Cursor End Start Address High Register 0C 00 Start Address Low Register 0D 00 Cursor Location High Register 0E 00 Cursor Location Low Register 0F 59 Vertical Retrace Start Register 10 EA Vertical Retrace End 11 8C bit 7 Protect Registers 0-7 (VGA only) 6 Bandwidth (VGA only) 5 Disable Vertical Interrupts (EGA only) 4 Clear Vertical Interrupts (EGA ony) 0-3 Vertical Retrace End Vertical Display End Register 12 DF Offset Register 13 28 Underline Location Register 14 00 bit 6 Double Word Mode (VGA only) 5 Count by Four (VGA only) 4-0 Underline Location Start Vertical Blank Register 15 E7 End Vertical Blank Register 16 04 6-0 End Vertical Blanking (VGA only) Mode Control Register 17 E3 bit 7 Hardware Reset 6 Word/Byte Mode 5 Address Wrap 4 Output Control (EGA only) 3 Count by Two 2 Horizontal Retrace Select 1 Select Row Scan Counter 0 Compatibility Mode Support Line Compare Register 18 FF Graphics Controller Registers: Address (rw 3CE/3CF) Set/Reset Register 00 00 Enable Set/Reset Register 01 00 Color Compare Register 02 00 Data Rotate Register 03 00 5,4 Function Select 3-0 Data Rotate Read Map Select Register 04 00 Mode Register 05 00 6,5 Shift Register (VGA only) 4 Odd/Even 3 Read Mode 2 Test Condition (EGA only) 1,0 Write Mode Miscellaneous Register 06 05 3,2 Memory Map 1 Chain Odd/Even 0 Graphics/Alphanumerics Mode Color Don't Care Register 07 0F Bit Mask Register 08 FF Attribute Controller Registers: Attribute Address Register (r 3C1/w 3C0) only one port dedicated bit 5 Pallette Address Source 00 4-0 Attribute Address Palette Registers: {bit 5 Secondary Red 00 00 4 Secondary Green 00 01 3 Secondary Blue 01 02 2 Red 03 03 1 Green 04 04 0 Blue } 05 05 06 14 07 07 08 38 09 39 0A 3A 0B 3B 0C 3C 0D 3D 0E 3E 0F 3F Mode Control Register 10 01 bit 7 Internal Palette Size (VGA only) 6 Pixel Clock Select (VGA only) 5 Pixel Panning Compatibility (VGA only) 3 Enable Blink or Intensity 2 Enable Line Graphics Character Codes 1 Display Type 0 Graphics/Alphanumeric Overscan Color Register 11 00 bit 5 Secondary Red 4 Secondary Green 3 Secondary Blue 2 Red 1 Green 0 Blue Color Plane Enable Register 12 0F 3-0 Color Planes Enable Horizontal Pixel Panning Register 13 00 Color Select Register 14 00 3,2 Color Register Address Bits 6 and 7 (VGA only) 1,0 Color Register Address Bits 4 and 5 (VGA only) Color Registers: PEL Address Write Mode Register (r 3C8/ w 3C8) PEL Address Read Mode Register (w 3C7) PEL Data Register (r 3C9/ w 3C9) DAC State Register (r 3C7) PEL Mask Register (r 3C6/ w 3C6) Laurie Salopek Pennsylvania State University