cleeland@rex.cs.tulane.edu (Chris Cleeland) (02/20/90)
The system here at Tulane consists (like many places) of heterogenous
processors on a network. Also, the file system is networked under
NFS. Thus, it is possible that I may be working on one of four different
systems, each with their own ideosyncrasies.
One thing that I would like to do is to have a makefile set up such
that I can type something like "make <hostname>" and the makefile
would automatically "know" what options (e.g., compiler) to use on
different hosts, without duplicating the entire (rather lengthy)
dependency file for each system.
I've played around with using make's internal macros, but that doesn't
seem to get me where I want to go (or I don't know how to coerce it
to do so!) On top of that, the man page associated with make for our
system is less than readable (unless you already know what you're talking
about), so it has provided endless amounts of cryptic fun.
My requests are these:
(1) Does anybody have any references to books, etc. that may prove
more helpful?
(2) Does anybody have *examples* of doing something like I'm trying
to do?
(3) Could someone give me an e-mail tutorial of make? (I could name
names, but I don't want to put anyone on the spot.)
Many thanks!
-cj
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Disclaimer: "I'm a student -- I can't afford one!"lois@hpfcdc.HP.COM (Lois Gerber) (02/23/90)
A good readable reference for using make is "Managing Project with Make",
A Nutshell handbook, by Steve Talbott, published by O'Reilly & Associates,
Inc. ISBN 0-937175-18-8. It is out of print but you can still get
copies; I know because I just got one a few weeks ago.
From the description of your problem, I am not sure what you are
trying to do, but I can tell you a few things which may point
you in the right direction.
1) Make reads the environment in which it is executed and uses all
variable declarations in environ() as macros for itself. If
this variable is not redeclared in the makefile as something else,
the environment value will be used. i.e. if CCOPTS is defined
in the environment and not in the makefile, any reference to
$(CCOPTS) in the makefile will use the value set in the environment.
2) Some makes have an include feature. If you have a line in the
makefile of the form:
include filename
make will read that file as another makefile and include all
macro definitions and rules in it as part of its environment.
In this way, you can centralize common definitions in one file
and just include that file in a multitude of other files,
preventing your need to repeat define things.
I might be able to help more if I had a clearer understanding of
exactly what you are trying to accomplish.
Lois Gerber
HP, Fort Collinsambar@ora.ora.com (Jean Marie Diaz) (02/27/90)
In article <5740048@hpfcdc.HP.COM> lois@hpfcdc.HP.COM (Lois Gerber) writes: >A good readable reference for using make is "Managing Project with Make", >A Nutshell handbook, by Steve Talbott, published by O'Reilly & Associates, >Inc. ISBN 0-937175-18-8. It is out of print but you can still get >copies; I know because I just got one a few weeks ago. _Managing Projects with Make_ is not out of print; in fact, it is both in stock, and on its way to our printer for an updated printing. (The changes aren't extensive; they fix some confusion about environment variables versus command-line macro definitions, and a few typos.) Thanks for the good words! AMBAR ambar@ora.com uunet!ora!ambar O'Reilly & Associates, Inc. Publishers of Nutshell Handbooks 90 Sherman Street, Cambridge, MA 02140; 617-354-5800 Book Orders => 632 Petaluma Ave, Sebastopol, CA 95472 800-338-NUTS (in CA 800-533-NUTS) FAX 707-829-0104