bcd@psueclb.BITNET (08/03/87)
could someone please fill me in the on 32000 processors available these
days (ie: what features they have, how fast are they etc.) I built a
32016 system some time ago (when it was still called the 16032).
thanks.
------------
Bryan Davis (BCD@PSUECL)
Engineering Computer Laboratory
Pennsylvania State University
grenley@nsc.nsc.com (George Grenley) (08/04/87)
In article <777@PSUECLB> bcd@psueclb.BITNET writes: >could someone please fill me in the on 32000 processors available these >days (ie: what features they have, how fast are they etc.) Sure. We make: 32008 - 6,8,10 mhz. Does not support MMU, but does support FPU. A part for cost sensitive designs 32016 - 6,8,10 mhz. Does work w/ MMU (32082). A better choice is 32C16 - 6,10,15 mhz. CMOS technology, still, you're probably better off with a newer part. 32032 - Mainstay of the line. 10 mhz operation, basic 1 MIP machine. 32332 - A definite jump up in performance, 2-2.5 MIPs. Full 32 bit physical address (the older parts are 24 bit). When combined with 32332 MMU makes a respectable Sun 3 class Unix workstation. 32532 - Our new baby. Samples due at first of year. Many, many mips. Blocks socks off '020, socks and shoes off '386. I know how fast it is but marketing says I'm supposed to keep my mouth shut. But it is fast. We will offer 20 to 30 mhz clock rates, VAX 8700 level performance. Again, as stated, we won't be sampling till first of year (it takes TIME to qual a part, guys - you don't ship the first wafer to customers, although I realize from your end it might seem that way sometimes), but the silicon is coming along nicely. Marketing says they've talked to the press, so expect some announcements. Let's see, I suppose you'll want some hard facts. The '532 combines the CPU with MMU, and adds Instruction and Data caches. Since our MMU is on chip, we can put the caches on the physical side of the bus. This allows us to add bus watcher logic, to maintain cache coherency during times when an external master (like the disk controller) is writing data to memory. Also, since it's a physical cache, when you change contexts, you don't have to dump the cache. This is a definite advantage over virtual caches. Most instructions take 2 clocks, so at 30 meg you're moving right along. (Your mileage may vary). Because the caches are relatively large (512 byte I, 1K D), the hit rate is about 80%, on real world applications. This has a practical advantage, because as a result, the part is not that 'sensitive' to external wait states - 1 wait state on every memory cycle only costs about 5%. Thus, it can be hooked directly to DRAM without giving up much - a boon to us harried system designers. Enough. George Grenley Nat'l Semiconductor (well, you didn't think I worked for Intel, did you?) which are 8, 16, and 32 bit bus interface versions of our 32 bit architecture.
gnu@hoptoad.uucp (John Gilmore) (08/08/87)
grenley@nsc.nsc.com (George Grenley) wrote: > 32332 - A definite jump up in performance, 2-2.5 MIPs. Full 32 bit > physical address (the older parts are 24 bit). When combined > with 32332 MMU makes a respectable Sun 3 class Unix workstation. He later corrected it to say 2 mips, not 2-2.5, continuing the strong NSC tradition of lying about chip performance in the 'executive summaries' while admitting it's lower when challenged by techies. What I'm wondering is, where is the respectable Sun-3 class Unix workstation built around this chip? I mean a physical workstation, not a theory about how easy it would be. -- {dasys1,ncoast,well,sun,ihnp4}!hoptoad!gnu gnu@postgres.berkeley.edu Alt.all: the alternative radio of the Usenet.
devoz@encore.UUCP (Joe Devincentis) (08/09/87)
In article <2674@hoptoad.uucp> gnu@hoptoad.uucp (John Gilmore) writes: > >He later corrected it to say 2 mips, not 2-2.5, continuing the strong >NSC tradition of lying about chip performance in the 'executive summaries' >while admitting it's lower when challenged by techies. How can the correction to a more reasonable number, (and how do YOU know how reasonable it is?), be a continuation of "a strong NSC tradition about lying about chip performance"? Which chip manufacturers are NOT "optimistic" about their chips MIPS rating? (6502's don't count, no one rates them in mips :-). > >What I'm wondering is, where is the respectable Sun-3 class Unix workstation >built around this chip? I mean a physical workstation, not a theory about >how easy it would be. >-- An in-house user of the sun 3 said to me that the 332 seems to perform just as well if not better (housed by a multimax 320 multiprocessor). (I haven't used the sun 3 YET). You might check with Whitechapel LTD? in the UK, they have an 032 workstation, maybe the have a 332 workstation now. Personally, I think that all of the micro manufacturers are making some exciting chips. It is confusing wading through the MIPS ratings, but it is easier than building one yourself :-). devoz@encore
grenley@nsc.nsc.com (George Grenley) (08/10/87)
In article <2674@hoptoad.uucp> gnu@hoptoad.uucp (John Gilmore) writes: >grenley@nsc.nsc.com (George Grenley) wrote: >> 32332 - A definite jump up in performance, 2-2.5 MIPs. Full 32 bit >> physical address (the older parts are 24 bit). When combined >> with 32332 MMU makes a respectable Sun 3 class Unix workstation. > >He later corrected it to say 2 mips, not 2-2.5, continuing the strong >NSC tradition of lying about chip performance in the 'executive summaries' >while admitting it's lower when challenged by techies. No, I didn't lie, John. I am a relatively new employee here, working on 532 hardware design. I got the '332 numbers from `word-of-mouth' from fellow techies - many of whom are Unix types, a breed which is, in my experience, vague about almost everything. As other readers of this group may recall, I have been vocal about criticizing, clarifying, and correcting what I consider to be misleading and/or erroneous claims about the '532. I do this often in spite of the displeasure I occasionally provoke from my management. I will continue to do so as long as I work here, because I think honesty works, and frankly because I think the part is good enough to win on its merits, not on cooked data. Just to get technical, there ARE benchmarks which run at better than 2.5 MIPS on a 332, so there. Furthermore, you can buy 20 mhz 332 (but not MMU), so for embedded controller applications ( a big chunk of our market), 2.5 MIP is a CONSERVATIVE rating. BTW, please note that the 20 mhz version is relatively new - I don't know what we're quoting for delivery times. >What I'm wondering is, where is the respectable Sun-3 class Unix workstation >built around this chip? I mean a physical workstation, not a theory about >how easy it would be. Quit cursing the darkness; go build one! Believe me, NSC would love to see it, too. Opus currently offers an '032 based board to convert a PC into a real-Unix machine, and they are working on a 332 based version - it might even be out yet, I don't know. Last but not least, our FAEs had one of their periodic technical training meetings two weeks ago, so now they know something about the 532 chip, VME, and system level plans. Call 'em. I expect we will start showing hardware to selected customers in November. It is up to YOU to be a selected customer. If you are legitimately interested in seeing stuff, contact your FAE, and copy me on the letter, or E-mail. My address: George Grenley NSC, m/s 7C266 1135 Kern Avenue Sunnyvale, CA 94086
mjd@doc.ic.ac.uk (Martin J Davies) (08/11/87)
HELP PLEASE !!! I have built two machines, one system uses 32016/32082, plus fpu. The other system uses 32032/32082 and has an identical set of peripherals and memory. The 32 bit system runs at about 8Mhz and is a wire wrap prototype. I have written a multiuser kernel in assembler which run perfectly on the 16 bit machine. However when ported to the 32 bit machine it works only 90%, crashing at regular intervals for no obvious reason. I have no ISE tools for the 32 bit system so debugging is proving really difficult. If anybody out there has had problems with this combination of chips, particularly using the MMU, I could do with some advice. The 32032 is a revision F part, the MMU a revision L, both are 10Mhz parts. Thanks in an advance, Phil.
rich@oxtrap.UUCP (K. Richard Magill) (08/11/87)
In article <4532@nsc.nsc.com> grenley@nsc.UUCP (George Grenley) writes: >In article <777@PSUECLB> bcd@psueclb.BITNET writes: >>could someone please fill me in the on 32000 processors available these >>days (ie: what features they have, how fast are they etc.) > >Sure. We make: ... > >32032 - Mainstay of the line. 10 mhz operation, basic 1 MIP machine. > First, if a 32032 is a 1 mip machine then a 68020 @ 16Mhz is about 2.8. Each of our sequent processors, (we have 6), feels like about .7 Mips. Second, it really is an elegant architecture. Now if it just ran at 30 Mhz.... rich.
doug@edge.UUCP (Doug Pardee) (08/13/87)
> > 32332 - A definite jump up in performance, 2-2.5 MIPs. Full 32 bit > > physical address (the older parts are 24 bit). When combined > > with 32332 MMU makes a respectable Sun 3 class Unix workstation. > > What I'm wondering is, where is the respectable Sun-3 class Unix workstation > built around this chip? I mean a physical workstation, not a theory about > how easy it would be. When I was at Terak a few years ago, we built a Unix workstation based on the 32016/32032/32332 CPUs. CalComp bought Terak, and sold the workstation under the label CalComp 7500. At the time, the 323xx support chips weren't available, so we used the 32081/32082 with the 32332. But that was a coupl'a years ago, and CalComp has probably upgraded it. You might check with them. [That's CalComp's Display Products Division, in Hudson, NH]. -- Doug Pardee, Edge Computer Corp; ihnp4!mot!edge!doug, seismo!ism780c!edge!doug