peter@stpl.UUCP (Peter CAMILLERI) (10/10/88)
In reading over the '88 master selection guide, I noticed the existance of certain 32k family parts with an "rt" suffix, that were touted as being "specially configured" for real time applications. The only specific mentioned was the lack of virtuall memory support. Some questions arise: 1) In what way are these processors "specially configured"? Do they have special instructions? sped up interrupt response timinigs? etc? 2) Have the normal grade unsuitable for RT usage. This one is important to me as I am currently designing with a 32C016 in a RT app. 3) Why must mmu functionality be considered at odds with RT. Sure, I agree that demand paging is out, but what about protected memory domains for multi-tasked RT apps. that are also critical in nature? Eg: an mmu is a must to catch the dereferencing of a "wild" pointer. Now I admit that simple memory ownership hardware could perform that task, but an mmu seems to have lower parts counts. 4) I know the ICU is a recent release, BUT.... when will it be available in cmos so I can dump my current altera e-pal kludge? The nmos version could almost be used as a space heater. :-) Well, that's all for now. As usual any response would be apreciated. In fact as the weather turns cold, I would'nt even mind a few warming flames... maybe a visit to california to discuss.... :^) -- Peter Camilleri peter@ists.UUCP Elan Data Technology Inc. peter@ists.yorku.ca 836 Yonge St., Toronto, Ontario, uunet!mnetor!yunexus!ists!peter CANADA M4W 2H1 (416) 968-6668
grenley@nsc.nsc.com (George Grenley) (10/14/88)
Heck, I didn't even know this was out, yet... but since you ask... In article <162@stpl.UUCP> peter@stpl.UUCP (Peter CAMILLERI) writes: >In reading over the '88 master selection guide, I noticed the existance >of certain 32k family parts with an "rt" suffix, that were touted as >being "specially configured" for real time applications. The only >specific mentioned was the lack of virtuall memory support. >Some questions arise: >1) In what way are these processors "specially configured"? Do they have >special instructions? sped up interrupt response timinigs? etc? It depends. The 32CG16 does have special instructions; in this case, bitblt operations to improve bit manipulation. This is intended to help out dot matrix printer (laser/inkjet/???) and CRT graphics applications. The 532 and newr stuff have "direct exception mode" for faster interrupt handling. >2) Have the normal grade unsuitable for RT usage. This one is important >to me as I am currently designing with a 32C016 in a RT app. I'm not sure I understand your question here. The "normal" parts work just fine. How could we tell you were using it for real time, anyway? Have you considered, by the way, using the CG16? It includes the TCU (201) functions, and will be available at faster clock rates than the c016. We recommend it for most new designs. >3) Why must mmu functionality be considered at odds with RT. Sure, I agree >that demand paging is out, but what about protected memory domains for >multi-tasked RT apps. that are also critical in nature? Eg: an mmu is >a must to catch the dereferencing of a "wild" pointer. Now I admit that >simple memory ownership hardware could perform that task, but an mmu >seems to have lower parts counts. I know, I know. There have been a few discussions about this, to say the least. Bottom line is, how much are you willing to pay (in both $ and performance hit) for MMU? 20% of CPU cost? Most users aren't, so we drop the MMU. Some users are; they can still buy the MMU version. >4) I know the ICU is a recent release, BUT.... when will it be available >in cmos so I can dump my current altera e-pal kludge? The nmos version >could almost be used as a space heater. :-) Frankly, I don't know. But, if you are interested, we would like to encourage you to publish your altera design. Might even be a few $ in it. Gimme a call at 408-721-5513. .... >In fact as the weather turns cold, I would'nt even mind a few >warming flames... maybe a visit to california to discuss.... :^) Perhaps you could just stand next to the ICU.... 8-) George Grenley neither here nor there NSC